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git01.mediatek.com / filogic / atf / e768ba203770dec6a5191ad90326f869ca345c9d / bl32 / tsp
  1. 85fa00e linker_script: move .rela.dyn section to bl_common.ld.h by Masahiro Yamada · Wed Apr 22 11:27:55 2020 +0900
  2. c5864d8 linker_script: move .data section to bl_common.ld.h by Masahiro Yamada · Wed Apr 22 10:50:12 2020 +0900
  3. 403990e linker_script: move stacks section to bl_common.ld.h by Masahiro Yamada · Tue Apr 07 13:04:24 2020 +0900
  4. dd053b6 linker_script: move bss section to bl_common.ld.h by Masahiro Yamada · Thu Mar 26 13:16:33 2020 +0900
  5. 583f8dd linker_script: replace common read-only data with RODATA_COMMON by Masahiro Yamada · Thu Mar 26 10:57:12 2020 +0900
  6. ac1bfb9 linker_script: move more common code to bl_common.ld.h by Masahiro Yamada · Thu Mar 26 10:51:39 2020 +0900
  7. 2598c41 Bug fix: Protect TSP prints with lock by Madhukar Pappireddy · Fri Mar 20 01:46:21 2020 -0500
  8. 0b67e56 Factor xlat_table sections in linker scripts out into a header file by Masahiro Yamada · Mon Mar 09 17:39:48 2020 +0900
  9. c4b47a2 TSP: corrected log information by Manish Pandey · Fri Mar 06 14:36:25 2020 +0000
  10. de634f8 TSP: add PIE support by Masahiro Yamada · Fri Jan 17 13:45:14 2020 +0900
  11. 0f7e601 Prevent speculative execution past ERET by Anthony Steinhauser · Tue Jan 07 15:44:06 2020 -0800
  12. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · Fri Sep 13 14:11:59 2019 +0100
  13. 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · Thu Jul 18 14:25:33 2019 +0100
  14. 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · Tue Jul 09 13:49:11 2019 -0700
  15. 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · Fri May 24 12:17:09 2019 +0100
  16. d5a5960 Apply stricter speculative load restriction by John Tsichritzis · Mon Mar 04 16:42:54 2019 +0000
  17. e61ece0 TSP: Enable pointer authentication support by Antonio Nino Diaz · Tue Feb 26 11:41:03 2019 +0000
  18. de97ff3 Remove duplicated definitions of linker symbols by Antonio Nino Diaz · Fri Jan 25 13:28:38 2019 +0000
  19. 1fbc97b Correct typographical errors by Paul Beesley · Fri Jan 11 18:26:51 2019 +0000
  20. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  21. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · Thu Nov 08 10:20:19 2018 +0000
  22. 95f30ab Add end_vector_entry assembler macro by Roberto Vargas · Tue Apr 17 11:31:43 2018 +0100
  23. d93fde3 Use ALIGN instead of NEXT in linker scripts by Roberto Vargas · Wed Apr 11 11:53:31 2018 +0100
  24. 0859d2c TSP: Enable cache along with MMU by Jeenu Viswambharan · Fri Apr 27 16:28:12 2018 +0100
  25. e93a0f4 types: use int-ll64 for both aarch32 and aarch64 by Masahiro Yamada · Fri Feb 02 15:09:36 2018 +0900
  26. d4b35e1 Fix MISRA rule 8.4 Part 3 by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  27. 69abcd4 Fix MISRA rule 8.3 Part 3 by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  28. 7c2a3ca Add comments about mismatched TCR_ELx and xlat tables by Antonio Nino Diaz · Fri Feb 23 15:07:54 2018 +0000
  29. 2ce2b09 Replace magic numbers in linkerscripts by PAGE_SIZE by Antonio Nino Diaz · Wed Nov 15 11:45:35 2017 +0000
  30. e42bdb9 Merge pull request #1054 from jwerner-chromium/JW_crash_x30 by davidcunado-arm · Tue Aug 22 18:25:55 2017 +0100
  31. 67ebde7 Fix x30 reporting for unhandled exceptions by Julius Werner · Thu Jul 27 14:59:34 2017 -0700
  32. b4c75e9 Add new alignment parameter to func assembler macro by Julius Werner · Tue Aug 01 15:16:36 2017 -0700
  33. f251a4c Merge pull request #925 from dp-arm/dp/spdx by davidcunado-arm · Thu May 04 16:35:19 2017 +0100
  34. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  35. 28f69ab Update terminology: standard SMC to yielding SMC by David Cunado · Wed Apr 05 11:34:03 2017 +0100
  36. 306593d Add support for GCC stack protection by Douglas Raillard · Fri Feb 24 18:14:15 2017 +0000
  37. 4ef91f1 Simplify translation tables headers dependencies by Antonio Nino Diaz · Mon Feb 20 14:22:22 2017 +0000
  38. 21362a9 Introduce unified API to zero memory by Douglas Raillard · Fri Dec 02 13:51:54 2016 +0000
  39. f212965 Abort preempted TSP STD SMC after PSCI CPU suspend by Douglas Raillard · Thu Nov 24 15:43:19 2016 +0000
  40. 68aef10 Define and use no_ret macro where no return is expected by Jeenu Viswambharan · Wed Nov 30 15:21:11 2016 +0000
  41. 7b5c9b3 Move spinlock library code to AArch64 folder by Soby Mathew · Mon Aug 08 12:42:53 2016 +0100
  42. bdba5e5 TSP: Print BL32_BASE rather than __RO_START__ by Sandrine Bailleux · Thu Jun 16 14:24:26 2016 +0100
  43. f91f144 Introduce SEPARATE_CODE_AND_RODATA build flag by Sandrine Bailleux · Fri Jul 08 14:37:40 2016 +0100
  44. 9e6ad6c Introduce some helper macros for exception vectors by Sandrine Bailleux · Tue May 24 16:56:03 2016 +0100
  45. f269714 Make:Remove calls to shell from makefiles. by Evan Lloyd · Wed Dec 02 18:17:37 2015 +0000
  46. 1f21bcf Remove all non-configurable dead loops by Antonio Nino Diaz · Mon Feb 01 13:57:25 2016 +0000
  47. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · Mon Dec 14 09:35:25 2015 +0000
  48. 7866424 TSP: Allow preemption of synchronous S-EL1 interrupt handling by Soby Mathew · Fri Nov 13 02:08:43 2015 +0000
  49. bec9851 Enable use of FIQs and IRQs as TSP interrupts by Soby Mathew · Thu Sep 03 18:29:38 2015 +0100
  50. bc91282 Unify interrupt return paths from TSP into the TSPD by Soby Mathew · Tue Sep 22 12:01:18 2015 +0100
  51. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · Fri Sep 11 16:03:13 2015 +0100
  52. 9a0ff9b Pass the target suspend level to SPD suspend hooks by Achin Gupta · Mon Sep 07 20:43:27 2015 +0100
  53. da43b66 PSCI: Migrate SPDs and TSP to the new platform and framework API by Soby Mathew · Wed Jul 08 21:45:46 2015 +0100
  54. f05c1b5 Add linker symbol declarations to bl_common.h by Dan Handley · Mon Apr 27 11:49:22 2015 +0100
  55. 81be100 Allow deeper platform port directory structure by Dan Handley · Fri Mar 27 17:44:35 2015 +0000
  56. eb839ce Fix type mismatches in verbose logging by Dan Handley · Mon Mar 23 18:13:33 2015 +0000
  57. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
  58. 8723adf Enable type-checking of arguments passed to printf() et al. by Sandrine Bailleux · Thu Feb 05 15:42:31 2015 +0000
  59. f512157 Save 'power_state' early in PSCI CPU_SUSPEND call by Soby Mathew · Tue Sep 30 11:19:51 2014 +0100
  60. 2ae2043 Remove coherent memory from the BL memory maps by Soby Mathew · Thu Jan 08 18:02:44 2015 +0000
  61. 1fe4336 Juno: Add support for Test Secure-EL1 Payload by Sandrine Bailleux · Thu Jul 17 09:56:29 2014 +0100
  62. 4dc4a47 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · Tue Aug 12 11:17:06 2014 +0100
  63. 9e46188 Merge pull request #189 from achingupta/ag/tf-issues#153 by Dan Handley · Tue Aug 19 11:04:21 2014 +0100
  64. 4fd2f5c Clarify platform porting interface to TSP by Dan Handley · Mon Aug 04 11:41:20 2014 +0100
  65. ed1744e Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · Mon Aug 04 23:13:10 2014 +0100
  66. e2c27f5 Move TSP private declarations into separate header by Dan Handley · Fri Aug 01 17:58:27 2014 +0100
  67. 91b624e Rationalize console log output by Dan Handley · Tue Jul 29 17:14:00 2014 +0100
  68. 534ae7f Merge pull request #179 from jcastillo-arm/jc/tf-issues/219 by danh-arm · Mon Aug 04 10:34:18 2014 +0100
  69. 4e81341 Support asynchronous method for BL3-2 initialization by Vikram Kanigiri · Tue Jul 15 16:49:22 2014 +0100
  70. b3dbeb0 Call platform_is_primary_cpu() only from reset handler by Juan Castillo · Wed Jul 16 15:53:43 2014 +0100
  71. 3299181 Merge pull request #170 from achingupta/ag/tf-issues#226 by danh-arm · Mon Jul 28 14:27:25 2014 +0100
  72. 289162c Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · Mon Jul 28 14:24:52 2014 +0100
  73. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · Fri Jul 18 18:38:28 2014 +0100
  74. 04be3a5 Add support for printing version at runtime by Juan Castillo · Mon Jun 30 11:41:46 2014 +0100
  75. afe7e2f Implement a leaner printf for Trusted Firmware by Soby Mathew · Thu Jun 12 17:23:58 2014 +0100
  76. e1aa516 Remove coherent stack usage from the warm boot path by Achin Gupta · Thu Jun 26 09:58:52 2014 +0100
  77. f4a9709 Remove coherent stack usage from the cold boot path by Achin Gupta · Wed Jun 25 19:26:22 2014 +0100
  78. 3c449d7 Merge pull request #163 from sandrine-bailleux/sb/tf-issue-117-v2 by danh-arm · Fri Jul 11 11:19:27 2014 +0100
  79. e2e0c65 fvp: Reuse BL1 and BL2 memory through image overlaying by Sandrine Bailleux · Mon Jun 16 16:12:27 2014 +0100
  80. fb42b12 Refactor fvp gic code to be a generic driver by Dan Handley · Fri Jun 20 09:43:15 2014 +0100
  81. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · Fri Jun 13 17:05:10 2014 +0100
  82. 701fea7 Further renames of platform porting functions by Dan Handley · Tue May 27 16:17:21 2014 +0100
  83. b226a4d Add enable mmu platform porting interfaces by Dan Handley · Fri May 16 14:08:45 2014 +0100
  84. ea45157 Rename FVP specific files and functions by Dan Handley · Thu May 15 14:53:30 2014 +0100
  85. 7ce42df Move BL porting functions into platform.h by Dan Handley · Thu May 15 14:11:36 2014 +0100
  86. ed6ff95 Split platform.h into separate headers by Dan Handley · Wed May 14 17:44:19 2014 +0100
  87. 335bf58 Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · Fri May 23 12:14:37 2014 +0100
  88. 6c8b359 Make the memory layout more flexible by Sandrine Bailleux · Thu May 22 15:28:26 2014 +0100
  89. 332ff85 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  90. 077193f Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  91. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  92. 891c4ca Use a vector table for TSP entrypoints by Andrew Thoelke · Tue May 20 21:43:27 2014 +0100
  93. 9f71f70 Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · Fri May 09 20:49:17 2014 +0100
  94. bbc33f2 Enable secure timer to generate S-EL1 interrupts by Achin Gupta · Fri May 09 13:33:42 2014 +0100
  95. a4f50c2 Add support for asynchronous FIQ handling in TSP by Achin Gupta · Fri May 09 12:17:56 2014 +0100
  96. 7671789 Add support for synchronous FIQ handling in TSP by Achin Gupta · Fri May 09 11:42:56 2014 +0100
  97. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · Fri May 09 12:00:17 2014 +0100
  98. e701e30 fvp: Move TSP from Secure DRAM to Secure SRAM by Sandrine Bailleux · Tue May 20 17:28:25 2014 +0100
  99. 5ac3cc9 TSP: Let the platform decide which secure memory to use by Sandrine Bailleux · Tue May 20 17:22:24 2014 +0100
  100. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · Fri May 16 18:48:12 2014 +0100