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git01.mediatek.com / filogic / atf / e18cf33418501c62a5d0dba0ff5dba69affb598d / plat / aspeed / ast2700 / plat_bl31_setup.c
  1. cc067c6 feat(ast2700): set up CPU clock frequency by SCU by Kevin Chen · Tue Jun 18 17:02:49 2024 +0800
  2. bc333de fix(ast2700): add device mapping for coherent memory by Chia-Wei Wang · Mon Oct 30 09:14:53 2023 +0800
  3. a741460 refactor(ast2700): adopt RESET_TO_BL31 boot flow by Chia-Wei Wang · Wed Sep 27 13:51:04 2023 +0800
  4. a7556d8 feat(ast2700): add Aspeed AST2700 platform support by Chia-Wei Wang · Wed Nov 02 17:50:21 2022 +0800