| commit | cc067c6f81db3d3a052e66472eefff66d8e5b66f | [log] [tgz] |
|---|---|---|
| author | Kevin Chen <kevin_chen@aspeedtech.com> | Tue Jun 18 17:02:49 2024 +0800 |
| committer | Kevin Chen <kevin_chen@aspeedtech.com> | Tue Jul 02 16:05:36 2024 +0800 |
| tree | efd9c76011dadb9a6ee3840b9e42271fa12283ab | |
| parent | 20f185e6c195121fb4baaa8c726271d2805e0f24 [diff] |
feat(ast2700): set up CPU clock frequency by SCU Modify generic timer frequency by SCU setting 1. check SCU_CPU_HW_STRAP1 using HPLL or MPLL SCU_CPU_HW_STRAP1[4]=1, using HPLL SCU_CPU_HW_STRAP1[4]=0, using MPLL 2. read HPLL or MPLL HPLL: frequency setting in SCU_CPU_HW_STRAP1[2:3] MPLL: CLKIN_25M with mul and div setting from SCU_CPU_MPLL Change-Id: I31eb10107b9da7c6746887ba36ead8ca61d86aae Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com>