1. 89256b8 PSCI: Introduce PSCI Library argument structure by Soby Mathew · 8 years ago
  2. a4c219a AArch32: Add support for ARM Cortex-A32 MPCore Processor by Yatharth Kochar · 8 years ago
  3. 5d36121 AArch32: Add generic changes in BL1 by Yatharth Kochar · 8 years ago
  4. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · 8 years ago
  5. 80ba687 Merge pull request #706 from dp-arm/dp/pmf-aligned-svc by danh-arm · 8 years ago
  6. 026f104 Merge pull request #705 from dp-arm/dp/pmf-macro-rename by danh-arm · 8 years ago
  7. 1a9644b Merge pull request #702 from jeenu-arm/psci-node-hw-state by danh-arm · 8 years ago
  8. 7f03e9d9 PSCI: Add support for PSCI NODE_HW_STATE API by Jeenu Viswambharan · 8 years ago
  9. 008cb2a Merge pull request #707 from sandrine-bailleux-arm/sb/restore-xlat-defines by davidcunado-arm · 8 years ago
  10. 072ce13 Restore some defines in xlat_tables.h by Sandrine Bailleux · 8 years ago
  11. 8810e83 Ensure PMF service timestamps are properly aligned on a cache line boundary by dp-arm · 8 years ago
  12. b28965e Rename `pmf_calc_timestamp_offset` to `pmf_calc_timestamp_addr` by dp-arm · 8 years ago
  13. 550bf5e Support for Mediatek MT6795 SoC by developer · 8 years ago
  14. c9bd651 Merge pull request #690 from soby-mathew/sm/level_sel_xlat by davidcunado-arm · 8 years ago
  15. a97bd89 Add assembler helper to calculate PMF timestamp offset by dp-arm · 8 years ago
  16. 6419ea3 Move pmf headers to include/lib/pmf by dp-arm · 8 years ago
  17. d48ae61 Automatically select initial xlation lookup level by Antonio Nino Diaz · 8 years ago
  18. 89d90dc AArch32: Add support to PSCI lib by Soby Mathew · 9 years ago
  19. 748be1d AArch32: Add support in TF libraries by Soby Mathew · 9 years ago
  20. acc144b AArch32: Add SMCC context by Soby Mathew · 9 years ago
  21. a9482df AArch32: Add API to invoke runtime service handler by Soby Mathew · 9 years ago
  22. 935c2e7 AArch32: Add translation table library support by Soby Mathew · 8 years ago
  23. c6820d1 AArch32: Add essential Arch helpers by Soby Mathew · 9 years ago
  24. c53ac5e Move SIZE_FROM_LOG2_WORDS macro to utils.h by Soby Mathew · 8 years ago
  25. 4ec7e2d Ensure addresses in is_mem_free() don't overflow by Sandrine Bailleux · 8 years ago
  26. d019487 Introduce PSCI Library Interface by Soby Mathew · 9 years ago
  27. 0d78607 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · 9 years ago
  28. a0fedc4 Rework type usage in Trusted Firmware by Soby Mathew · 8 years ago
  29. ba39fc6 Merge pull request #662 from sandrine-bailleux-arm/sb/rodata-xn by danh-arm · 8 years ago
  30. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · 8 years ago
  31. 66552da Introduce round_up/down() macros by Sandrine Bailleux · 8 years ago
  32. 7659a26 Introduce utils.h header file by Sandrine Bailleux · 8 years ago
  33. ac3aa68 xlat lib: Introduce MT_EXECUTE/MT_EXECUTE_NEVER attributes by Sandrine Bailleux · 8 years ago
  34. 9518d02 Add Performance Measurement Framework(PMF) by Yatharth Kochar · 9 years ago
  35. a83af08 Merge pull request #639 from danh-arm/dh/import-libfdt by danh-arm · 8 years ago
  36. 9ea2e25 Merge pull request #644 from sandrine-bailleux-arm/sb/rm-outdated-comment by danh-arm · 8 years ago
  37. fc0c645 Minor libfdt changes to enable TF integration by Dan Handley · 8 years ago
  38. d7b59e4 Move stdlib header files to include/lib/stdlib by Dan Handley · 8 years ago
  39. c2a11c6 xlat lib: Remove out-dated comment by Sandrine Bailleux · 8 years ago
  40. 63af687 Add support for ARM Cortex-A73 MPCore Processor by Yatharth Kochar · 9 years ago
  41. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · 9 years ago
  42. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · 9 years ago
  43. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · 9 years ago
  44. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · 9 years ago
  45. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · 9 years ago
  46. b2b79e8 Merge pull request #595 from sandrine-bailleux-arm/sb/unoptimised-build by danh-arm · 9 years ago
  47. 37a12df Fix build error with optimizations disabled (-O0) by Sandrine Bailleux · 9 years ago
  48. 44170c4 Refactor the xlat_tables library code by Soby Mathew · 9 years ago
  49. 55f9f4b Merge pull request #577 from antonio-nino-diaz-arm/an/remove-xlat-helpers by danh-arm · 9 years ago
  50. 346f1f9 Remove xlat_helpers.c by Antonio Nino Diaz · 9 years ago
  51. 851dc7e Add ISR_EL1 to crash report by Gerald Lejeune · 9 years ago
  52. 6af70f5 Remove DAIF bits handling macros by Gerald Lejeune · 9 years ago
  53. 52b1ba6 Extend memory attributes to map non-cacheable memory by Sandrine Bailleux · 9 years ago
  54. 6c2d663 Merge pull request #523 from jcastillo-arm/jc/genfw-791 by danh-arm · 9 years ago
  55. 2e86cb1 ARM platforms: rationalise memory attributes of shared memory by Juan Castillo · 9 years ago
  56. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 9 years ago
  57. 46dd170 Remove direct usage of __attribute__((foo)) by Soren Brinkmann · 9 years ago
  58. 432aa77 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · 9 years ago
  59. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 9 years ago
  60. 8b0eafe Initialize VTTBR_EL2 when bypassing EL2 by Sandrine Bailleux · 9 years ago
  61. 92712a5 Add ARM GICv3 driver without support for legacy operation by Achin Gupta · 9 years ago
  62. c66bb64 Merge pull request #435 from sandrine-bailleux/sb/juno-r2 by Achin Gupta · 9 years ago
  63. 29a7a03 Juno R2: Configure the correct L2 RAM latency values by Sandrine Bailleux · 9 years ago
  64. 94efd1f Add missing RES1 bit in SCTLR_EL1 by Vikram Kanigiri · 9 years ago
  65. 9fbf5e4 Make CASSERT() macro callable from anywhere by Sandrine Bailleux · 9 years ago
  66. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · 9 years ago
  67. e466c9f Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · 9 years ago
  68. 3ce4e88 Add macros for retention control in Cortex-A53/A57 by Varun Wadekar · 9 years ago
  69. 4fceaca cortex_a53: Add A53 errata #826319, #836870 by developer · 9 years ago
  70. a310c4f Add mmio utility functions by developer · 9 years ago
  71. 28463b9 Add "Project Denver" CPU support by Varun Wadekar · 9 years ago
  72. ea59668 Add header guards to asm macro files by Dan Handley · 10 years ago
  73. 0cdebbd Remove use of PLATFORM_CACHE_LINE_SIZE by Dan Handley · 10 years ago
  74. 05cbb00 Merge pull request #277 from soby-mathew/sm/coh_lock_opt by danh-arm · 10 years ago
  75. 2eb68ca Merge pull request #280 from vwadekar/tlkd-fixed-v3 by danh-arm · 10 years ago
  76. 97625e3 Translate secure/non-secure virtual addresses by Varun Wadekar · 10 years ago
  77. 156280c Remove the `owner` field in bakery_lock_t data structure by Soby Mathew · 10 years ago
  78. a0a897d Optimize the bakery lock structure for coherent memory by Soby Mathew · 10 years ago
  79. 632432b Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support by danh-arm · 10 years ago
  80. c47e011 Add support for ARM Cortex-A72 processor by Vikram Kanigiri · 10 years ago
  81. 4e97e54 Use ARM CCI driver on FVP and Juno platforms by Vikram Kanigiri · 10 years ago
  82. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  83. 26fb90e Return success if an interrupt is seen during PSCI CPU_SUSPEND by Soby Mathew · 10 years ago
  84. 523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · 10 years ago
  85. ed99566 Add macros for domain specific barriers. by Soby Mathew · 10 years ago
  86. 30c231b Prevent optimisation of sysregs accessors calls by Sandrine Bailleux · 10 years ago
  87. e2b2d8f Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · 10 years ago
  88. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  89. 070a3e0 Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · 10 years ago
  90. b08bc04 Create BL stage specific translation tables by Soby Mathew · 10 years ago
  91. c93c9df Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 10 years ago
  92. feddfcf Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · 10 years ago
  93. 798140d Juno: Implement initial platform port by Sandrine Bailleux · 10 years ago
  94. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  95. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  96. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  97. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  98. 7b83c44 Move IO storage source to drivers directory by Dan Handley · 10 years ago
  99. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  100. e998254 Make enablement of the MMU more flexible by Achin Gupta · 10 years ago