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git01.mediatek.com / filogic / atf / dbbf79a957fae01c952e8acf4ca348cb41b17ff6 / fdts / stm32mp15xx-dkx.dtsi
  1. dbbf79a fix(fdts stm32mp1): set ETH clock on PLL4P on ST boards by Yann Gautier · 3 years, 2 months ago
  2. bb053d5 feat(fdts stm32mp1): align DT with latest kernel by Yann Gautier · 2 years, 8 months ago
  3. 4ede20a fdts: stm32mp1: realign device tree with kernel by Yann Gautier · 3 years, 10 months ago