| commit | dbbf79a957fae01c952e8acf4ca348cb41b17ff6 | [log] [tgz] |
|---|---|---|
| author | Yann Gautier <yann.gautier@foss.st.com> | Mon May 17 11:25:37 2021 +0200 |
| committer | Yann Gautier <yann.gautier@st.com> | Thu Oct 28 11:36:54 2021 +0200 |
| tree | 41464431deefbfca14d53e4cabdb846b02162ede | |
| parent | 5496f12b18de6fed829b044bb5b79e6abc60115e [diff] |
fix(fdts stm32mp1): set ETH clock on PLL4P on ST boards Set Ethernet source clock on PLL4P. This is required to enable PTP. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Ia64fbb681d3f04f2b90f373c5eb044f5daa2836c