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git01.mediatek.com / filogic / atf / d6cede37e26f763f0349d07a21f73497abd104c9 / plat / intel / soc / agilex / platform.mk
  1. d6cede3 Merge "feat(intel): enable SDMMC frontdoor load for ATF->Linux" into integration by Sandrine Bailleux · 10 months ago
  2. c271599 feat(intel): enable query of fip offset on RSU by Mahesh Rao · 1 year, 3 months ago
  3. 477aef4 feat(intel): support wipe DDR after calibration by Jit Loon Lim · 1 year, 3 months ago
  4. c5a3e3a feat(intel): enable SDMMC frontdoor load for ATF->Linux by Jit Loon Lim · 1 year, 1 month ago
  5. ef2b295 chore: remove MULTI_CONSOLE_API references by Michal Simek · 1 year, 2 months ago
  6. 11b9b49 refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3 by Arvind Ram Prakash · 2 years ago
  7. 55803a2 fix(intel): fix UART baud rate and clock by Sieu Mun Tang · 2 years, 5 months ago
  8. dc2daae build(agilex): platform changes for verifying gpt header crc by Rohit Ner · 2 years, 6 months ago
  9. 044ed48 feat(intel): support version 2 SiP SVC SMC function ID for non-mailbox commands by Sieu Mun Tang · 2 years, 6 months ago
  10. a4a4327 feat(intel): implement timer init divider via cpu frequency. (#1) by BenjaminLimJL · 2 years, 8 months ago
  11. 2f94ca4 feat(intel): enable firewall for OCRAM in BL31 by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 4 months ago
  12. 1205ef0 feat(intel): create source file for firewall configuration by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 4 months ago
  13. dbcc2cf fix(intel): fix ECC Double Bit Error handling by Sieu Mun Tang · 2 years, 9 months ago
  14. f3a5d02 build(intel): define a macro for SIMICS build by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 5 months ago
  15. 9f22cbf build(intel): initial commit for crypto driver by Sieu Mun Tang · 2 years, 9 months ago
  16. 6474096 intel: mailbox: Ensure time out duration is predictive by Chee Hong Ang · 4 years, 6 months ago
  17. 0ae8d9a intel: platform: Include GICv2 makefile by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
  18. fcbc33d plat: intel: set DRVSEL and SMPLSEL for DWMMC by Tien Hock Loh · 4 years, 6 months ago
  19. 8d9e891 intel: Enable EMAC PHY in Intel FPGA platform by Tien Hock, Loh · 5 years ago
  20. 36a9f30 intel: Add bridge control for FPGA reconfig by Hadi Asyrafi · 5 years ago
  21. 8ebd237 intel: System Manager refactoring by Hadi Asyrafi · 5 years ago
  22. 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · 5 years ago
  23. 5ae876f intel: Refactor common platform code [5/5] by Hadi Asyrafi · 5 years ago
  24. 4d9f395 intel: Refactor common platform code [4/5] by Hadi Asyrafi · 5 years ago
  25. 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · 5 years ago
  26. f0fa807 intel: Refactor common platform code [2/5] by Hadi Asyrafi · 5 years ago
  27. 9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · 5 years ago
  28. 461f8f4 Invalidate dcache build option for bl2 entry at EL3 by Hadi Asyrafi · 5 years ago
  29. 309ac01 intel: Platform common code refactor by Hadi Asyrafi · 5 years ago
  30. 6a240c7 intel: Platform common code refactor by Hadi Asyrafi · 5 years ago
  31. 616da77 intel: Adds support for Agilex platform by Hadi Asyrafi · 5 years ago