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git01.mediatek.com / filogic / atf / d4c5f9c408841dd48fe4a3800440191d3ebc98c4 / include / arch
  1. 51a9711 feat(trf): enable trace filter control register access from lower NS EL by Manish V Badarkhe · Thu Jul 08 09:33:18 2021 +0100
  2. 8ce3394 feat(trf): initialize trap settings of trace filter control registers access by Manish V Badarkhe · Sun Jul 18 02:26:27 2021 +0100
  3. f356f7e feat(sys_reg_trace): enable trace system registers access from lower NS ELs by Manish V Badarkhe · Tue Jun 29 11:44:20 2021 +0100
  4. f7ee064 feat(sys_reg_trace): initialize trap settings of trace system registers access by Manish V Badarkhe · Wed Jul 07 16:27:10 2021 +0100
  5. 20df29c feat(trbe): enable access to trace buffer control registers from lower NS EL by Manish V Badarkhe · Fri Jul 02 09:10:56 2021 +0100
  6. e1cccb4 feat(trbe): initialize trap settings of trace buffer control registers access by Manish V Badarkhe · Wed Jun 23 20:02:39 2021 +0100
  7. dd8af68 Merge "fix(sdei): set SPSR for SDEI based on TakeException" into integration by Manish Pandey · Mon Jul 26 11:15:30 2021 +0200
  8. c79c3e9 Merge "refactor(aarch64): remove `FEAT_BTI` architecture check" into integration by Joanna Farley · Sat Jul 24 18:38:19 2021 +0200
  9. 44b4333 fix(sdei): set SPSR for SDEI based on TakeException by Daniel Boulby · Wed Nov 25 16:36:46 2020 +0000
  10. c450277 feat(sve): enable SVE for the secure world by Max Shvetsov · Mon Mar 22 11:59:37 2021 +0000
  11. b4ba2b3 refactor(aarch64): remove `FEAT_BTI` architecture check by Chris Kay · Tue Mar 09 16:01:38 2021 +0000
  12. 307f34b fix(security): Set MDCR_EL3.MCCD bit by Alexei Fedorov · Fri May 14 11:21:56 2021 +0100
  13. 514e59c Add PIE support for AARCH32 by Yann Gautier · Mon Oct 05 11:02:54 2020 +0200
  14. e57bce8 Avoid the use of linker *_SIZE__ macros by Yann Gautier · Tue Aug 18 14:42:41 2020 +0200
  15. 592a479 Merge changes from topic "dcc_console" into integration by Madhukar Pappireddy · Tue Apr 13 21:42:55 2021 +0200
  16. f80014d drivers: dcc: Support JTAG DCC console by Venkatesh Yadav Abbarapu · Fri Nov 27 02:58:24 2020 -0700
  17. 08fec33 arch: Enable `FEAT_SB` for supported non-Armv8.5-A platforms by Chris Kay · Tue Mar 09 13:34:35 2021 +0000
  18. fa59c6f Enable v8.6 AMU enhancements (FEAT_AMUv1p1) by johpow01 · Fri Oct 02 13:41:11 2020 -0500
  19. 6fd816e Define registers for FEAT_RNG support by Tomas Pilar · Wed Oct 28 15:34:12 2020 +0000
  20. f3a4c54 Add support for FEAT_MTPMU for Armv8.6 by Javier Almansa Sobrino · Mon Nov 23 18:38:15 2020 +0000
  21. 9ecc255 Merge "Aarch64: Add support for FEAT_PANx extensions" into integration by Manish Pandey · Thu Dec 03 13:08:02 2020 +0000
  22. af54f6e Aarch64: Add support for FEAT_MTE3 by Alexei Fedorov · Tue Dec 01 13:22:25 2020 +0000
  23. c082f03 Aarch64: Add support for FEAT_PANx extensions by Alexei Fedorov · Wed Nov 25 14:07:05 2020 +0000
  24. 5c29cba aarch64/arm: Add compiler barrier to barrier instructions by Andre Przywara · Fri Oct 16 18:19:03 2020 +0100
  25. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · Tue Aug 04 16:18:52 2020 -0500
  26. bde5c95 Add wrapper for AT instruction by Manish V Badarkhe · Tue Jul 14 14:43:12 2020 +0100
  27. e07e808 runtime_exceptions: Update AT speculative workaround by Manish V Badarkhe · Thu Jul 23 12:43:25 2020 +0100
  28. 7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · Tue Jul 14 08:17:56 2020 +0100
  29. 9223485 Prevent RAS register access from lower ELs by Varun Wadekar · Fri Jun 12 10:11:28 2020 -0700
  30. 8357389 Enable ARMv8.6-ECV Self-Synch when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:48:02 2020 -0500
  31. ecc3c67 Enable ARMv8.6-FGT when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:47:56 2020 -0500
  32. 1993355 TF-A: Fix wrong register read for MPAM extension by Alexei Fedorov · Tue May 26 13:16:41 2020 +0100
  33. 3e24c16 Enable v8.6 WFE trap delays by johpow01 · Wed Apr 22 14:05:13 2020 -0500
  34. 5dc9e9c Fix compilation error when ENABLE_PIE=1 by Varun Wadekar · Sat May 16 20:59:30 2020 -0700
  35. 2801ed4 Implement workaround for AT speculative behaviour by Manish V Badarkhe · Tue Apr 28 04:53:32 2020 +0100
  36. 2bae35f SPMD: code/comments cleanup by Olivier Deprez · Thu Apr 16 13:39:06 2020 +0200
  37. 90d6532 Provide a hint to power controller for DSU cluster power down by Madhukar Pappireddy · Wed Oct 30 14:24:39 2019 -0500
  38. 019b4f8 locks: bakery: use is_dcache_enabled() helper by Masahiro Yamada · Thu Apr 02 15:35:19 2020 +0900
  39. a5c6636 Fix MISRA C issues in BL1/BL2/BL31 by John Powell · Fri Mar 20 14:21:05 2020 -0500
  40. 8a6e961 Add get_current_el_maybe_constant() by Masahiro Yamada · Thu Mar 26 13:18:48 2020 +0900
  41. 84d681f Merge "el3_entrypoint_common: avoid overwriting arg3" into integration by Manish Pandey · Thu Mar 19 22:35:13 2020 +0000
  42. 442f0df Merge "Use Speculation Barrier instruction for v8.5 cores" into integration by Mark Dykes · Thu Mar 12 14:32:13 2020 +0000
  43. bfe7bb6 Use Speculation Barrier instruction for v8.5 cores by Madhukar Pappireddy · Tue Mar 10 18:04:59 2020 -0500
  44. 3e0584a Merge "Fix crash dump for lower EL" into integration by Mark Dykes · Wed Mar 11 15:39:32 2020 +0000
  45. a55d428 Merge "aarch32: stop speculative execution past exception returns" into integration by Mark Dykes · Mon Mar 09 16:02:06 2020 +0000
  46. 813c9f9 Fix crash dump for lower EL by Alexei Fedorov · Tue Mar 03 13:31:58 2020 +0000
  47. c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · Mon Feb 17 16:15:47 2020 +0000
  48. bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · Tue Feb 25 13:56:19 2020 +0000
  49. fcbcd6f aarch32: stop speculative execution past exception returns by Madhukar Pappireddy · Wed Feb 26 12:37:05 2020 -0600
  50. c241b57 el3_entrypoint_common: avoid overwriting arg3 by Yann Gautier · Tue Jan 28 11:45:38 2020 +0100
  51. 787a129 Tegra: delay_timer: support for physical secure timer by Varun Wadekar · Mon Jun 18 16:15:51 2018 -0700
  52. b8f26e9 Make PAC demangling more generic by Alexei Fedorov · Thu Feb 06 17:11:03 2020 +0000
  53. 0f7e601 Prevent speculative execution past ERET by Anthony Steinhauser · Tue Jan 07 15:44:06 2020 -0800
  54. 31a14e1 bl31: Split into two separate memory regions by Samuel Holland · Wed Oct 17 21:40:18 2018 -0500
  55. eb1e7e4 Merge changes from topic "aa/sel2_support" into integration by Olivier Deprez · Fri Dec 13 16:26:32 2019 +0000
  56. c825768 PIE: make call to GDT relocation fixup generalized by Manish Pandey · Tue Nov 26 11:34:17 2019 +0000
  57. a533447 S-EL2 Support: Check for AArch64 by Artsem Artsemenka · Tue Nov 26 16:40:31 2019 +0000
  58. 023c155 Add support for enabling S-EL2 by Achin Gupta · Fri Oct 11 14:44:05 2019 +0100
  59. 20be077 Changes to support updated register usage in SMCCC v1.2 by Madhukar Pappireddy · Sat Nov 09 23:28:08 2019 -0600
  60. add24a4 Explicitly disable the SPME bit in MDCR_EL3 by Petre-Ionut Tudor · Thu Oct 03 17:09:08 2019 +0100
  61. d2f21b8 Add missing support for BL2_AT_EL3 in XIP memory by Lionel Debieve · Mon May 27 09:32:00 2019 +0200
  62. 9074dea AArch32: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 20 15:22:44 2019 +0100
  63. 7c9a4e6 Merge "Refactor ARMv8.3 Pointer Authentication support code" into integration by Soby Mathew · Fri Sep 13 15:22:23 2019 +0000
  64. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · Fri Sep 13 14:11:59 2019 +0100
  65. 461f8f4 Invalidate dcache build option for bl2 entry at EL3 by Hadi Asyrafi · Tue Aug 20 15:33:27 2019 +0800
  66. c235b12 Merge changes from topic "jc/mte_enable" into integration by Soby Mathew · Thu Sep 12 12:31:22 2019 +0000
  67. 83e0488 Add UBSAN support and handlers by Justin Chadwell · Tue Aug 20 11:01:52 2019 +0100
  68. 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · Thu Jul 18 14:25:33 2019 +0100
  69. c7a7cc3 Merge "AArch64: Disable Secure Cycle Counter" into integration by Paul Beesley · Fri Aug 23 11:26:57 2019 +0000
  70. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 13 15:17:53 2019 +0100
  71. a95a589 FVP_Base_AEMv8A platform: Fix cache maintenance operations by Alexei Fedorov · Mon Jul 29 17:22:53 2019 +0100
  72. 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · Tue Jul 09 13:49:11 2019 -0700
  73. c97455a Merge changes from topic "jts/spsr" into integration by Soby Mathew · Thu Jul 25 09:13:49 2019 +0000
  74. 5553417 SSBS: init SPSR register with default SSBS value by John Tsichritzis · Tue Jul 23 11:12:41 2019 +0100
  75. 4bf6afa Merge "Enable MTE support unilaterally for Normal World" into integration by Soby Mathew · Tue Jul 23 08:55:10 2019 +0000
  76. 35e08da console: update skeleton by Ambroise Vincent · Fri May 31 16:21:59 2019 +0100
  77. 830f0ad Enable MTE support unilaterally for Normal World by Soby Mathew · Fri Jul 12 09:23:38 2019 +0100
  78. c31ab38 Aarch64: Fix SCTLR bit definitions by Alexei Fedorov · Wed Jul 10 10:49:12 2019 +0100
  79. 007d745 arch: add some defines for generic timer registers by Yann Gautier · Wed Apr 17 13:47:07 2019 +0200
  80. 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · Fri May 24 12:17:09 2019 +0100
  81. 16d006b Workaround for cortex-A76 errata 1286807 by Soby Mathew · Fri May 03 13:17:56 2019 +0100
  82. 457c64e aarch32: Allow compiling with soft-float toolchain by Manish Pandey · Mon Apr 01 15:27:18 2019 +0100
  83. bc6fdc0 Remove deprecated interfaces by Ambroise Vincent · Wed Mar 27 16:06:02 2019 +0000
  84. 0a0ca8b Console: remove deprecated finish_console_register by Ambroise Vincent · Wed Mar 27 15:45:35 2019 +0000
  85. 37f97a5 SPM: Move shim layer to TTBR1_EL1 by Antonio Nino Diaz · Wed Mar 27 11:10:31 2019 +0000
  86. 1f9ff49 Apply variant 4 mitigation for Neoverse N1 by John Tsichritzis · Mon Mar 04 16:41:26 2019 +0000
  87. b091eb9 Ensure proper ID register is checked for feature detection by Dimitris Papastamos · Wed Feb 27 11:46:48 2019 +0000
  88. e1e7845 Correctly check for support of Address Authentication by Antonio Nino Diaz · Fri Mar 01 09:35:26 2019 +0000
  89. f6505a7 Merge pull request #1845 from ambroise-arm/av/errata by Antonio Niño Díaz · Fri Mar 01 09:17:27 2019 +0000
  90. 92cad35 Merge pull request #1846 from loumay-arm/lm/mpam by Antonio Niño Díaz · Fri Mar 01 09:17:16 2019 +0000
  91. bdfa103 MPAM: enable MPAM EL2 traps by Louis Mayencourt · Mon Feb 11 11:25:50 2019 +0000
  92. 23b7b69 Merge pull request #1839 from loumay-arm/lm/a7x_errata by Antonio Niño Díaz · Thu Feb 28 10:19:24 2019 +0000
  93. f5fdfbc Cortex-A53: Workarounds for 819472, 824069 and 827319 by Ambroise Vincent · Thu Feb 21 14:16:24 2019 +0000
  94. 25cda67 Add support for pointer authentication by Antonio Nino Diaz · Tue Feb 19 11:53:51 2019 +0000
  95. 594811b Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · Thu Jan 31 11:58:00 2019 +0000
  96. 404184d Merge pull request #1831 from antonio-nino-diaz-arm/an/sccd by Antonio Niño Díaz · Wed Feb 27 09:21:42 2019 +0000
  97. 78a0aed Add workaround for errata 764081 of Cortex-A75 by Louis Mayencourt · Wed Feb 20 12:11:41 2019 +0000
  98. 078e66f plat/arm: Support for Cortex A5 in FVP Versatile Express platform by Usama Arif · Wed Dec 12 17:14:29 2018 +0000
  99. b69ac08 Division functionality for cores that dont have divide hardware. by Usama Arif · Wed Dec 12 17:08:33 2018 +0000
  100. 3fbd3f5 Disable processor Cycle Counting in Secure state by Antonio Nino Diaz · Mon Feb 18 16:55:43 2019 +0000