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git01.mediatek.com / filogic / atf / cd73619611244f3f57d4c254b98113edc17821e0 / lib / cpus / aarch64
  1. 56369c1 Rename Cortex-Ares to Neoverse N1 by John Tsichritzis · 6 years ago
  2. 97ff6d0 Rename Cortex-Ares filenames to Neoverse N1 by John Tsichritzis · 6 years ago
  3. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  4. aa00aff AArch64: Use SSBS for CVE_2018_3639 mitigation by Jeenu Viswambharan · 6 years ago
  5. 9fe40fd Fix MISRA defects in workaround and errata framework by Antonio Nino Diaz · 6 years ago
  6. 033b4bb Fix MISRA defects in extension libs by Antonio Nino Diaz · 6 years ago
  7. 0980dce Make errata reporting mandatory for CPU files by Soby Mathew · 6 years ago
  8. 7c461d7 ti: k3: common: Do not disable cache on TI K3 core powerdown by Andrew F. Davis · 6 years ago
  9. 5e7e4a7 Fix the Cortex-ares errata reporting function name by Soby Mathew · 6 years ago
  10. cd38e6e cpus: denver: Implement static workaround for CVE-2018-3639 by Varun Wadekar · 6 years ago
  11. 2b91412 cpus: denver: reset power state to 'C1' on boot by Varun Wadekar · 6 years ago
  12. 007a206 denver: use plat_my_core_pos() to get core position by Varun Wadekar · 7 years ago
  13. 13110b4 DSU erratum 936184 workaround: bug fix by John Tsichritzis · 6 years ago
  14. 268e699 Merge pull request #1388 from vwadekar/report-cve-2017-5715 by Dimitris Papastamos · 6 years ago
  15. bc242fa cpus: denver: report CVE_2017_5715 mitigation to higher layers by Varun Wadekar · 6 years ago
  16. 4daa1de DSU erratum 936184 workaround by John Tsichritzis · 6 years ago
  17. a7c4687 Add initial CPU support for Cortex-Helios by Joel Hutton · 7 years ago
  18. 9463cae Add initial CPU support for Cortex-Deimos by Joel Hutton · 7 years ago
  19. 95f30ab Add end_vector_entry assembler macro by Roberto Vargas · 7 years ago
  20. bb0aa39 cpulib: Add ISBs or comment why they are unneeded by Dimitris Papastamos · 6 years ago
  21. 14f7005 Fix MISRA Rule 5.7 Part 1 by Daniel Boulby · 7 years ago
  22. 8c18f6a Merge pull request #1397 from dp-arm/dp/cortex-a76 by Dimitris Papastamos · 6 years ago
  23. 312e17e Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76 by Dimitris Papastamos · 7 years ago
  24. 7ca21db Implement Cortex-Ares 1043202 erratum workaround by Dimitris Papastamos · 7 years ago
  25. 89736dd Add AMU support for Cortex-Ares by Dimitris Papastamos · 7 years ago
  26. ea84d6b Add support for Cortex-Ares and Cortex-A76 CPUs by Isla Mitchell · 7 years ago
  27. 6694633 Fast path SMCCC_ARCH_WORKAROUND_1 calls from AArch32 by Dimitris Papastamos · 6 years ago
  28. ba51d9e Add support for dynamic mitigation for CVE-2018-3639 by Dimitris Papastamos · 7 years ago
  29. e6625ec Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 7 years ago
  30. 570c06a Rename symbols and files relating to CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  31. e34bd09 Workaround for CVE-2017-5715 on NVIDIA Denver CPUs by Varun Wadekar · 7 years ago
  32. 6e1796e Check presence of fix for errata 835769 in Cortex-A53 by Jonathan Wright · 7 years ago
  33. efb1f33 Check presence of fix for errata 843419 in Cortex-A53 by Jonathan Wright · 7 years ago
  34. 914757c Fixup `SMCCC_ARCH_FEATURES` semantics by Dimitris Papastamos · 7 years ago
  35. 780cc95 Use PFR0 to identify need for mitigation of CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  36. 864364a MISRA fixes for Cortex A75 AMU implementation by Dimitris Papastamos · 7 years ago
  37. 1be747f Refactor AMU support for Cortex A75 by Dimitris Papastamos · 7 years ago
  38. 0b00f8a Factor out CPU AMU helpers by Dimitris Papastamos · 7 years ago
  39. 8ca3144 Merge pull request #1253 from dp-arm/dp/amu32 by davidcunado-arm · 7 years ago
  40. 0dcdd8d AMU: Implement context save/restore for aarch32 by Joel Hutton · 7 years ago
  41. 2880363 Optimize SMCCC_ARCH_WORKAROUND_1 on Cortex A57/A72/A73 and A75 by Dimitris Papastamos · 7 years ago
  42. b63c6f1 Optimize/cleanup BPIALL workaround by Dimitris Papastamos · 7 years ago
  43. 04285cf Merge pull request #1228 from dp-arm/dp/cve_2017_5715 by davidcunado-arm · 7 years ago
  44. b5d1f8e Merge pull request #1200 from robertovargas-arm/bl2-el3 by davidcunado-arm · 7 years ago
  45. 858bd61 Print erratum application report for CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  46. e0e9946 bl2-el3: Add BL2_EL3 image by Roberto Vargas · 7 years ago
  47. fa2b736 Merge pull request #1197 from dp-arm/dp/amu by davidcunado-arm · 7 years ago
  48. d7e2e9e Add hooks to save/restore AMU context for Cortex A75 by Dimitris Papastamos · 7 years ago
  49. 43e05ec Use PFR0 to identify need for mitigation of CVE-2017-5915 by Dimitris Papastamos · 7 years ago
  50. c52ebdc Workaround for CVE-2017-5715 on Cortex A73 and A75 by Dimitris Papastamos · 7 years ago
  51. 446f7f1 Workaround for CVE-2017-5715 on Cortex A57 and A72 by Dimitris Papastamos · 7 years ago
  52. fcedb69 Implement support for the Activity Monitor Unit on Cortex A75 by Dimitris Papastamos · 7 years ago
  53. c3b4ca1 Cortex-A72: Implement workaround for erratum 859971 by Eleanor Bonnici · 7 years ago
  54. 0c9bd27 Cortex-A57: Implement workaround for erratum 859972 by Eleanor Bonnici · 7 years ago
  55. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  56. 9930501 Fix order of #includes by Isla Mitchell · 7 years ago
  57. d56fb04 Apply workarounds for A53 Cat A Errata 835769 and 843419 by Douglas Raillard · 7 years ago
  58. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  59. 805c2c7 Add support for Cortex-A75 and Cortex-A55 CPUs by David Wang · 8 years ago
  60. 815faa8 Use a callee-saved register to be AAPCS-compliant by dp-arm · 8 years ago
  61. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  62. 7c65c1e Remove build option `ASM_ASSERTION` by Antonio Nino Diaz · 8 years ago
  63. 00eefd9 Add workaround for ARM Cortex-A53 erratum 855873 by Andre Przywara · 8 years ago
  64. c4364f6 Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat by davidcunado-arm · 8 years ago
  65. 3f13c35 Apply workaround for errata 813419 of Cortex-A57 by Antonio Nino Diaz · 8 years ago
  66. 8f87cc3 cpus: denver: remove barrier from denver_enable_dco() by Varun Wadekar · 9 years ago
  67. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · 9 years ago
  68. 3c337a6 cpus: Add support for all Denver variants by Varun Wadekar · 9 years ago
  69. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  70. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  71. 1f5f812 Correct system include order by David Cunado · 8 years ago
  72. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  73. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · 8 years ago
  74. 63af687 Add support for ARM Cortex-A73 MPCore Processor by Yatharth Kochar · 9 years ago
  75. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · 9 years ago
  76. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · 9 years ago
  77. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · 9 years ago
  78. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · 9 years ago
  79. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · 9 years ago
  80. 6b28c57 Make cpu operations warning a VERBOSE print by Soby Mathew · 9 years ago
  81. f12a31d Cortex-Axx: Unconditionally apply CPU reset operations by Sandrine Bailleux · 9 years ago
  82. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 9 years ago
  83. 432aa77 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · 9 years ago
  84. 4fceaca cortex_a53: Add A53 errata #826319, #836870 by developer · 9 years ago
  85. 28463b9 Add "Project Denver" CPU support by Varun Wadekar · 9 years ago
  86. e364a8a Fix recursive crash prints on FVP AEM model by Soby Mathew · 10 years ago
  87. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · 10 years ago
  88. 632432b Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support by danh-arm · 10 years ago
  89. c47e011 Add support for ARM Cortex-A72 processor by Vikram Kanigiri · 10 years ago
  90. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · 10 years ago
  91. b5a6304 Fix the Cortex-A57 reset handler register usage by Soby Mathew · 10 years ago
  92. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  93. 7d861ea Invalidate the dcache after initializing cpu-ops by Soby Mathew · 10 years ago
  94. 937488b Optimize Cortex-A57 cluster power down sequence on Juno by Soby Mathew · 10 years ago
  95. 1604fa0 Optimize barrier usage during Cortex-A57 power down by Soby Mathew · 10 years ago
  96. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  97. 42aa5eb Add support for level specific cache maintenance operations by Soby Mathew · 10 years ago
  98. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  99. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  100. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago