- d9006fc feat(intel): add SMC for enquiring firmware version by Abdul Halim, Muhammad Hadi Asyrafi · 3 years, 9 months ago
- 959143d fix(intel): configuration status based on start request by Abdul Halim, Muhammad Hadi Asyrafi · 3 years, 11 months ago
- 5406498 fix(intel): bit-wise configuration flag handling by Sieu Mun Tang · 2 years, 7 months ago
- 37c7076 fix(intel): get config status OK status by Abdul Halim, Muhammad Hadi Asyrafi · 4 years ago
- fbc3913 fix(intel): use macro as return value by Abdul Halim, Muhammad Hadi Asyrafi · 4 years ago
- 351e884 fix(intel): fix fpga config write return mechanism by Abdul Halim, Muhammad Hadi Asyrafi · 4 years ago
- e6d5de9 feat(intel): add SiP service for DCMF status by Sieu Mun Tang · 2 years, 7 months ago
- 681631b feat(intel): add RSU 'Max Retry' SiP SMC services by Chee Hong Ang · 4 years, 5 months ago
- b30ce3f feat(intel): enable SMC SoC FPGA bridges enable/disable by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 5 months ago
- 2cfd8ec feat(intel): add SMC/PSCI services for DCMF version support by Chee Hong Ang · 4 years, 6 months ago
- 869d4f5 feat(intel): allow to access all register addresses if DEBUG=1 by Siew Chin Lim · 3 years, 6 months ago
- b251c33 fix(intel): modify how configuration type is handled by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 6 months ago
- f9cb657 feat(intel): support SiP SVC version by Sieu Mun Tang · 2 years, 7 months ago
- 2f94ca4 feat(intel): enable firewall for OCRAM in BL31 by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
- 1205ef0 feat(intel): create source file for firewall configuration by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
- 616b5e7 fix(intel): refactor NOC header by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
- b19ac61 feat(intel): add macro to switch between different UART PORT by Boon Khai Ng · 3 years, 3 months ago
- a34b881 feat(intel): add SMC support for ROM Patch SHA384 mailbox by Sieu Mun Tang · 2 years, 8 months ago
- 1e5550b build(intel): enable access to on-chip ram in BL31 for N5X by Boon Khai Ng · 3 years, 6 months ago
- a544da1 fix(intel): make FPGA memory configurations platform specific by Sieu Mun Tang · 2 years, 9 months ago
- dbcc2cf fix(intel): fix ECC Double Bit Error handling by Sieu Mun Tang · 2 years, 8 months ago
- f3a5d02 build(intel): define a macro for SIMICS build by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 5 months ago
- 8881ad0 build(intel): add N5X as a new Intel platform by Sieu Mun Tang · 2 years, 8 months ago
- 9f22cbf build(intel): initial commit for crypto driver by Sieu Mun Tang · 2 years, 9 months ago
- c353b0a Merge "fix(intel): assert if bl_mem_params is NULL pointer" into integration by Madhukar Pappireddy · 2 years, 9 months ago
- f57b5cc Merge changes I75b3e3bf,I4cf9f1d9,I50d2ae74,Idbe62410,I84bbd06e, ... into integration by Madhukar Pappireddy · 2 years, 9 months ago
- 2468266 fix(intel): null pointer handling for resp_len by Sieu Mun Tang · 2 years, 9 months ago
- 33b89d5 fix(intel): define macros to handle buffer entries by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 5 months ago
- f02f0cb fix(intel): change SMC return arguments for INTEL_SIP_SMC_MBOX_SEND_CMD by Sieu Mun Tang · 2 years, 9 months ago
- bf90984 fix(intel): always set doorbell to SDM after sending command by Siew Chin Lim · 3 years, 4 months ago
- a076315 fix(intel): fix bit masking issue in intel_secure_reg_update by Siew Chin Lim · 3 years, 4 months ago
- 461f544 fix(intel): fix ddr address range checker by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 5 months ago
- 380924d fix(intel): assert if bl_mem_params is NULL pointer by Siew Chin Lim · 3 years, 5 months ago
- ae4cd3a fix(intel): enable HPS QSPI access by default by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 1 month ago
- cf93158 plat/intel: do not keep mmc_device_info in stack by Yann Gautier · 3 years, 8 months ago
- 118ab21 intel: common: Fix non-MISRA compliant code v2 by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 1 month ago
- 1b0e8cb intel: mailbox: Fix non-MISRA compliant code by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
- 5bc87bc intel: mailbox: Mailbox error recovery handling by Chee Hong Ang · 4 years, 6 months ago
- 7d66e14 intel: mailbox: Enable sending large mailbox command by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 6 months ago
- 14a1d43 intel: mailbox: Use retry count in mailbox poll by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 6 months ago
- 6474096 intel: mailbox: Ensure time out duration is predictive by Chee Hong Ang · 4 years, 6 months ago
- 39d137b intel: mailbox: Read mailbox response even there is an error by Chee Hong Ang · 4 years, 6 months ago
- 94fae38 intel: mailbox: Driver now handles larger response by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 7 months ago
- 20a07f3 intel: common: Change how mailbox handles job id & buffer by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 6 months ago
- 046e1f1 intel: common: Improve readability of mailbox read response by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 9 months ago
- 99b5e16 intel: SIP: increase FPGA_CONFIG_SIZE to 32 MB by Richard Gong · 4 years, 7 months ago
- 2b7d13e intel: common: Remove urgent from mailbox async by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 6 months ago
- b45f15e intel: common: Improve mailbox driver readability by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 6 months ago
- ec164b6 intel: common: Clean up mailbox and sip header by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 6 months ago
- 2382b11 intel: clear 'PLAT_SEC_ENTRY' in early platform setup by Chee Hong Ang · 4 years, 7 months ago
- 0ae8d9a intel: platform: Include GICv2 makefile by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 3 months ago
- 64d2b2f plat: intel: Additional instruction required to enable global timer by Tien Hock Loh · 4 years, 6 months ago
- 070ffbb plat: intel: Fix CCU initialization for Agilex by Tien Hock Loh · 4 years, 6 months ago
- c5baddf plat: intel: Add FPGAINTF configuration to when configuring pinmux by Tien Hock Loh · 4 years, 6 months ago
- fcbc33d plat: intel: set DRVSEL and SMPLSEL for DWMMC by Tien Hock Loh · 4 years, 6 months ago
- 7a5f8da plat: intel: Fix clock configuration bugs by Tien Hock Loh · 4 years, 6 months ago
- 7dd4add Merge "intel: Enable EMAC PHY in Intel FPGA platform" into integration by Sandrine Bailleux · 4 years, 9 months ago
- 6bedfe2 Merge "intel: Fix argument type for mailbox driver" into integration by Sandrine Bailleux · 4 years, 9 months ago
- 25f623e intel: Update RSU driver return code by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 9 months ago
- 98b5a11 16550: Use generic console_t data structure by Andre Przywara · 4 years, 10 months ago
- d84bfef intel: Fix argument type for mailbox driver by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 9 months ago
- 8d9e891 intel: Enable EMAC PHY in Intel FPGA platform by Tien Hock, Loh · 5 years ago
- c4c4dec Merge "intel: Fix Coverity Scan Defects" into integration by Sandrine Bailleux · 4 years, 9 months ago
- e59b999 intel: Fix Coverity Scan Defects by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 9 months ago
- 7f95059 Merge "intel: Change boot source selection" into integration by Sandrine Bailleux · 4 years, 9 months ago
- c39a0e0 intel: Include address range check for SiP Mailbox by Abdul Halim, Muhammad Hadi Asyrafi · 4 years, 9 months ago
- a33e810 intel: Introduce SMC support for mailbox command by Hadi Asyrafi · 5 years ago
- 593c4c5 intel: Extend SiP service to support mailbox's RSU by Hadi Asyrafi · 5 years ago
- 29c65f7 Merge "intel: agilex: Enable uboot BL31 loading" into integration by Manish Pandey · 4 years, 10 months ago
- 786db4d intel: Change boot source selection by Hadi Asyrafi · 4 years, 11 months ago
- 218d8fe intel: agilex: Enable uboot BL31 loading by Hadi Asyrafi · 4 years, 10 months ago
- fc9b411 Enable -Wredundant-decls warning check by Madhukar Pappireddy · 5 years ago
- dda01cb intel: Unify Platform specific defines for PSCI module by Deepika Bhavnani · 5 years ago
- 6aeb55d intel: Add function to check fpga readiness by Hadi Asyrafi · 5 years ago
- 36a9f30 intel: Add bridge control for FPGA reconfig by Hadi Asyrafi · 5 years ago
- 0c6dae2 intel: FPGA config_isdone() status query by Hadi Asyrafi · 5 years ago
- 8ebd237 intel: System Manager refactoring by Hadi Asyrafi · 5 years ago
- 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · 5 years ago
- e73c511 intel: Enable bridge access in Intel platform by Hadi Asyrafi · 5 years ago
- 3afb87a intel: Modify non secure access function by Hadi Asyrafi · 5 years ago
- ed6927d Merge "plat: intel: Fix UEFI decompression issue" into integration by Manish Pandey · 4 years, 10 months ago
- b1ab915 plat: intel: Fix UEFI decompression issue by Tien Hock, Loh · 5 years ago
- cee6aa9 intel: Change all global sip function to static by Hadi Asyrafi · 5 years ago
- af5dec6 Merge changes from topic "sip-svc" into integration by Manish Pandey · 4 years, 10 months ago
- 99361aa Merge "intel: Fix memory calibration" into integration by Manish Pandey · 4 years, 10 months ago
- 3ceb8d9 intel: Remove un-needed checks for qspi driver r/w by Hadi Asyrafi · 4 years, 10 months ago
- 1fab9c3 Remove redundant declarations. by Madhukar Pappireddy · 4 years, 11 months ago
- 966f282 intel: Fix memory calibration by Hadi Asyrafi · 5 years ago
- 5fae68f intel: Implement platform specific system reset 2 by Hadi Asyrafi · 5 years ago
- 6794230 intel: Enable SiP SMC secure register access by Hadi Asyrafi · 5 years ago
- 1e2e3ce Merge changes from topic "mailbox-fixes" into integration by Manish Pandey · 5 years ago
- 5011d23 Merge "intel: Create SiP service header file" into integration by Manish Pandey · 5 years ago
- f3a7c14 intel: Fix SMC SIP service by Hadi Asyrafi · 5 years ago
- 9dfc047 intel: Introduce mailbox response length handling by Hadi Asyrafi · 5 years ago
- 2b9198d intel: Fix mailbox config return status by Hadi Asyrafi · 5 years ago
- a91818f intel: Mailbox driver logic fixes by Hadi Asyrafi · 5 years ago
- 500b232 plat: intel: Fix FPGA manager on reconfiguration by Tien Hock, Loh · 5 years ago
- 527234a plat: intel: Fix mailbox send_cmd issue by Tien Hock, Loh · 5 years ago
- c8a281c intel: stratix10: Modify BL31 parameter handling by Hadi Asyrafi · 5 years ago
- a2edf0e intel: Modify BL31 address mapping by Hadi Asyrafi · 5 years ago