1. c8d47a7 stm32mp1: allow non-secure access to reset upon periph registration by Etienne Carriere · Wed May 13 13:53:15 2020 +0200
  2. 875f85a stm32mp1: allow non-secure access to clocks upon periph registration by Etienne Carriere · Wed May 13 10:20:34 2020 +0200
  3. 1bbb924 stm32mp1: shared resources: peripheral registering by Etienne Carriere · Wed May 13 14:22:01 2020 +0200
  4. 1368ada drivers: st: clock: register parent of secure clocks by Etienne Carriere · Wed May 13 11:49:49 2020 +0200
  5. e704f99 stm32mp1: shared resources: add trace messages by Etienne Carriere · Wed May 13 15:51:56 2020 +0200
  6. ac295aa Merge "arm_fpga: Fix MPIDR topology checks" into integration by Madhukar Pappireddy · Thu Jul 02 23:47:50 2020 +0000
  7. a5b7388 Merge changes from topic "stm32-shres" into integration by Mark Dykes · Thu Jul 02 16:11:10 2020 +0000
  8. fb167ca Merge "stm32mp1: introduce shared resources support" into integration by Mark Dykes · Thu Jul 02 16:10:12 2020 +0000
  9. 5135b87 Merge "doc: Fix some broken links" into integration by Manish Pandey · Thu Jul 02 14:50:02 2020 +0000
  10. ee4d02a Merge "Workaround for Neoverse N1 erratum 1800710" into integration by Lauren Wehrmeister · Wed Jul 01 16:57:11 2020 +0000
  11. 8322b90 Merge "doc: RAS: fixing broken links" into integration by Lauren Wehrmeister · Wed Jul 01 15:56:19 2020 +0000
  12. 4e82472 doc: Fix some broken links by Sandrine Bailleux · Wed Jul 01 13:53:07 2020 +0200
  13. 9c9f38a doc: RAS: fixing broken links by Manish Pandey · Tue Jun 30 00:46:08 2020 +0100
  14. 58ced41 Merge "linker_script: move .rela.dyn section to bl_common.ld.h" into integration by Sandrine Bailleux · Tue Jun 30 13:42:09 2020 +0000
  15. bffb81e Merge "plat/arm: Add assert for the valid address of dtb information" into integration by Sandrine Bailleux · Tue Jun 30 12:12:32 2020 +0000
  16. 46a0b41 Merge "Fix makefile to build on a Windows host PC" into integration by Manish Pandey · Mon Jun 29 23:49:20 2020 +0000
  17. 1bc7b0e Fix makefile to build on a Windows host PC by Sami Mujawar · Thu Apr 23 09:28:37 2020 +0100
  18. b94bd05 Merge "stm32mp1: disable neon in sp_min" into integration by Mark Dykes · Mon Jun 29 15:59:45 2020 +0000
  19. 5f8d417 Merge "stm32mp1: check stronger the secondary CPU entry point" into integration by Mark Dykes · Mon Jun 29 15:58:23 2020 +0000
  20. 9cb29f0 plat/arm: Add assert for the valid address of dtb information by Manish V Badarkhe · Mon Jun 29 07:17:24 2020 +0100
  21. cffa1b5 Merge "allwinner: Disable NS access to PRCM power control registers" into integration by André Przywara · Mon Jun 29 11:50:47 2020 +0000
  22. 62d401a allwinner: Disable NS access to PRCM power control registers by Samuel Holland · Sun Dec 29 16:12:12 2019 -0600
  23. 85fa00e linker_script: move .rela.dyn section to bl_common.ld.h by Masahiro Yamada · Wed Apr 22 11:27:55 2020 +0900
  24. 1934d51 Merge changes Ib9c82b85,Ib348e097,I4dc315e4,I58a8ce44,Iebc03361, ... into integration by Manish Pandey · Fri Jun 26 13:59:38 2020 +0000
  25. 43318de arm_fpga: Fix MPIDR topology checks by Andre Przywara · Thu Jun 25 13:10:13 2020 +0100
  26. ffb8719 Merge changes from topic "fw_config_handoff" into integration by Sandrine Bailleux · Fri Jun 26 07:31:59 2020 +0000
  27. 8141451 doc: Update arg usage for BL2 and BL31 setup functions by Manish V Badarkhe · Wed Jun 24 15:58:38 2020 +0100
  28. 824cb5c doc: Update BL1 and BL2 boot flow by Manish V Badarkhe · Sun Jun 21 05:41:11 2020 +0100
  29. 8717e03 plat/arm: Use only fw_config between bl2 and bl31 by Manish V Badarkhe · Sat May 30 17:40:44 2020 +0100
  30. 8d0effa Merge changes from topic "fw_config_handoff" into integration by Sandrine Bailleux · Fri Jun 26 07:06:52 2020 +0000
  31. 6d9b5ee Workaround for Neoverse N1 erratum 1800710 by johpow01 · Tue Jun 02 13:14:11 2020 -0500
  32. 81200ac Merge "stm32mp1: use last page of SYSRAM as SCMI shared memory" into integration by Mark Dykes · Thu Jun 25 18:37:51 2020 +0000
  33. df6075e Merge "stm32mp1: SP_MIN embeds Arm Architecture services" into integration by Mark Dykes · Thu Jun 25 18:33:27 2020 +0000
  34. f4aa11b Merge "Redirect security incident report to TrustedFirmware.org" into integration by Mark Dykes · Thu Jun 25 18:27:16 2020 +0000
  35. 5051b86 Merge "doc: Add a binding document for COT descriptors" into integration by Mark Dykes · Thu Jun 25 18:23:50 2020 +0000
  36. 61acf62 Merge "plat/fvp: Dynamic description of clock freq" into integration by Mark Dykes · Thu Jun 25 18:20:21 2020 +0000
  37. 38bd575 Merge "fconf: Extract Timer clock freq from HW_CONFIG dtb" into integration by Mark Dykes · Thu Jun 25 18:18:57 2020 +0000
  38. f784898 Merge "Workaround for Cortex A77 erratum 1800714" into integration by Lauren Wehrmeister · Thu Jun 25 18:15:33 2020 +0000
  39. 68aedc7 Workaround for Cortex A77 erratum 1800714 by johpow01 · Wed Jun 03 15:23:31 2020 -0500
  40. ece96fd doc: Update memory layout for firmware configuration area by Manish V Badarkhe · Sat Jun 13 09:42:28 2020 +0100
  41. fbf1fd2 plat/arm: Increase size of firmware configuration area by Manish V Badarkhe · Tue Jun 09 11:31:17 2020 +0100
  42. 99a8e14 plat/arm: Load and populate fw_config and tb_fw_config by Manish V Badarkhe · Thu Jun 11 22:32:11 2020 +0100
  43. b8d8a4f Merge "Fix usage of incorrect function name" into integration by Sandrine Bailleux · Thu Jun 25 07:14:41 2020 +0000
  44. 9656a30 plat/fvp: Dynamic description of clock freq by laurenw-arm · Wed Jun 10 16:33:18 2020 -0500
  45. fc3e7a2 fconf: Extract Timer clock freq from HW_CONFIG dtb by laurenw-arm · Thu Feb 06 11:42:18 2020 -0600
  46. 85e9ba4 Redirect security incident report to TrustedFirmware.org by Sandrine Bailleux · Mon Jun 22 12:11:47 2020 +0200
  47. e069f8a fconf: Handle error from fconf_load_config by Manish V Badarkhe · Thu Jun 11 22:25:53 2020 +0100
  48. 8c66f7a plat/arm: Update the fw_config load call and populate it's information by Manish V Badarkhe · Thu Jun 11 22:09:10 2020 +0100
  49. bb533c7 fconf: Allow fconf to load additional firmware configuration by Manish V Badarkhe · Thu Jun 11 22:17:30 2020 +0100
  50. 1da211a fconf: Clean confused naming between TB_FW and FW_CONFIG by Manish V Badarkhe · Sun May 31 10:17:59 2020 +0100
  51. 244027d tbbr/dualroot: Add fw_config image in chain of trust by Louis Mayencourt · Thu Jun 11 21:15:15 2020 +0100
  52. a1ffcf7 cert_tool: Update cert_tool for fw_config image support by Manish V Badarkhe · Thu Jun 11 21:08:45 2020 +0100
  53. e9207d6 fiptool: Add fw_config in FIP by Manish V Badarkhe · Thu Jun 11 21:02:03 2020 +0100
  54. 64616a5 plat/arm: Rentroduce tb_fw_config device tree by Manish V Badarkhe · Sun May 31 08:53:40 2020 +0100
  55. e1cd83d Merge changes Ifc34f2e9,Iefd58159 into integration by Lauren Wehrmeister · Tue Jun 23 20:17:24 2020 +0000
  56. 2396cde Fix usage of incorrect function name by Sheetal Tigadoli · Tue Jun 23 21:12:28 2020 +0530
  57. da686b8 Merge "FFA Version interface update" into integration by Manish Pandey · Tue Jun 23 15:12:03 2020 +0000
  58. f329920 doc: Add a binding document for COT descriptors by Manish V Badarkhe · Tue Jun 23 10:30:42 2020 +0100
  59. 4c95c70 FFA Version interface update by J-Alves · Tue May 26 14:03:05 2020 +0100
  60. 196c2ac stm32mp1: SP_MIN embeds Arm Architecture services by Etienne Carriere · Tue Jun 23 09:26:15 2020 +0200
  61. 72369b1 stm32mp1: use last page of SYSRAM as SCMI shared memory by Etienne Carriere · Sun Dec 08 08:17:56 2019 +0100
  62. 5a0f82f stm32mp1: check stronger the secondary CPU entry point by Etienne Carriere · Mon Jun 08 20:25:08 2020 +0200
  63. ca651fb stm32mp1: disable neon in sp_min by Etienne Carriere · Fri Apr 10 18:51:54 2020 +0200
  64. 7a4a34f stm32mp1: shared resources: apply registered configuration by Etienne Carriere · Wed May 13 10:07:45 2020 +0200
  65. beb53d9 stm32mp1: shared resources: count GPIOZ bank pins by Etienne Carriere · Wed May 13 10:13:54 2020 +0200
  66. 316d634 stm32mp1: shared resources: define resource identifiers by Etienne Carriere · Mon Dec 02 10:08:48 2019 +0100
  67. 7ad2c01 stm32mp1: introduce shared resources support by Etienne Carriere · Sun Dec 08 08:14:03 2019 +0100
  68. 5c9ed08 Workaround for Cortex A76 erratum 1800710 by johpow01 · Tue Jun 02 15:02:28 2020 -0500
  69. 9603f98 Workaround for Cortex A76 erratum 1791580 by johpow01 · Fri May 29 14:17:38 2020 -0500
  70. fb272c7 Merge changes from topic "tegra-memctrlv2-vpr-resize-bugfix" into integration by Manish Pandey · Mon Jun 22 21:45:12 2020 +0000
  71. ae9dc6a Merge "TF-A GIC driver: Add barrier before eoi" into integration by Madhukar Pappireddy · Mon Jun 22 19:57:52 2020 +0000
  72. c96ea0a Merge "TF-A: Add ARMv8.5 'bti' build option" into integration by Mark Dykes · Mon Jun 22 19:07:03 2020 +0000
  73. ef6f81f Merge changes from topic "scmi-msg" into integration by Manish Pandey · Mon Jun 22 14:24:31 2020 +0000
  74. 754ce97 Merge "Fix typo in file Header guard" into integration by Sandrine Bailleux · Mon Jun 22 12:20:40 2020 +0000
  75. 4c2ebee TF-A GIC driver: Add barrier before eoi by Sandeep Tripathy · Fri Jun 05 22:04:21 2020 +0530
  76. 82a6084 Merge "Tegra: introduce support for GICv3" into integration by Olivier Deprez · Mon Jun 22 09:16:30 2020 +0000
  77. 4d18fc3 Fix typo in file Header guard by Sheetal Tigadoli · Tue Jun 02 18:28:09 2020 +0530
  78. 11f5db5 Tegra: sanity check NS address and size before use by Varun Wadekar · Tue Jun 02 21:16:00 2020 -0700
  79. 841ffeb plat: marvell: armada: a8k: add OP-TEE OS MMU tables by Konstantin Porotchkin · Mon Apr 15 16:29:08 2019 +0300
  80. 2ef36a3 drivers: marvell: add support for mapping the entire LLC to SRAM by Konstantin Porotchkin · Sun Mar 31 16:58:11 2019 +0300
  81. 03f3541 plat: marvell: armada: add LLC SRAM CCU setup for AP806/AP807 platforms by Konstantin Porotchkin · Sun Mar 31 17:16:35 2019 +0300
  82. d2a19cc plat: marvell: armada: reduce memory size reserved for FIP image by Marcin Wojtas · Fri Jun 19 17:51:08 2020 +0200
  83. 5f8630b plat: marvell: armada: platform definitions cleanup by Konstantin Porotchkin · Fri Jun 19 17:48:48 2020 +0200
  84. ac2cf92 plat: marvell: armada: a8k: check CCU window state before loading MSS BL2 by Konstantin Porotchkin · Sun Mar 31 17:22:53 2019 +0300
  85. 06f4dd0 drivers: marvell: add CCU driver API for window state checking by Konstantin Porotchkin · Sun Mar 31 17:20:19 2019 +0300
  86. fa8c130 drivers: marvell: align and extend llc macros by Konstantin Porotchkin · Mon Mar 25 15:35:41 2019 +0200
  87. 7947359 plat: marvell: a8k: move address config of cp1/2 to BL2 by Ben Peled · Tue Mar 26 19:06:24 2019 +0200
  88. 459366b plat: marvell: armada: re-enable BL32_BASE definition by Konstantin Porotchkin · Thu Mar 14 17:24:40 2019 +0200
  89. d3d6a1c plat: marvell: a8k: extend includes to take advantage of the phy_porting_layer by Grzegorz Jaszczyk · Thu Mar 28 16:09:38 2019 +0100
  90. 7a61f16 marvell: comphy: initialize common phy selector for AP mode by Grzegorz Jaszczyk · Thu Mar 28 13:02:42 2019 +0100
  91. 3eb5e40 marvell: comphy: update rx_training procedure by Grzegorz Jaszczyk · Fri Mar 08 19:51:21 2019 +0100
  92. 95ad87c plat: marvell: armada: configure amb for all CPs by Grzegorz Jaszczyk · Fri Apr 12 12:56:07 2019 +0200
  93. e039e48 TF-A: Add ARMv8.5 'bti' build option by Alexei Fedorov · Fri Jun 19 14:33:49 2020 +0100
  94. 5b7c50d Tegra: introduce support for GICv3 by Varun Wadekar · Thu Jun 11 21:53:09 2020 -0700
  95. e31d083 Tegra: memctrl_v2: fixup sequence to resize video memory by Varun Wadekar · Tue Jun 02 21:08:38 2020 -0700
  96. 45f1655 plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs by Marcin Wojtas · Thu Jun 18 19:50:47 2020 +0200
  97. 46c4b14 Merge changes I80316689,I23cac4fb,If911e7de,I169ff358,I4e040cd5, ... into integration by Manish Pandey · Wed Jun 17 19:44:51 2020 +0000
  98. 66685f7 drivers/scmi-msg: smt entry points for incoming messages by Etienne Carriere · Fri May 01 10:36:03 2020 +0200
  99. e96e953 Merge "plat/arm: Fix load address of TB_FW_CONFIG" into integration by Sandrine Bailleux · Wed Jun 17 13:56:44 2020 +0000
  100. 02a4ba5 drivers/scmi-msg: support for reset domain protocol by Etienne Carriere · Fri May 01 10:33:22 2020 +0200