- 72b69b8 refactor(el3-runtime): replace ARM_ARCH_AT_LEAST macro with FEAT flags by Jayanth Dodderi Chidanand · 2 years, 7 months ago
- 13ae0f4 fix(amu): fault handling on EL2 context switch by Jayanth Dodderi Chidanand · 2 years, 9 months ago
- b6301e6 feat(rme): add context management changes for FEAT_RME by Zelalem Aweke · 3 years, 1 month ago
- f91e59f feat(hcx): add build option to enable FEAT_HCX by johpow01 · 3 years ago
- f57491e fix(el3_runtime): correct CASSERT for pauth by Olivier Deprez · 3 years ago
- c450277 feat(sve): enable SVE for the secure world by Max Shvetsov · 3 years, 5 months ago
- cf784f7 Fix: Remove save/restore of EL2 timer registers by Max Shvetsov · 3 years, 5 months ago
- fba2572 Fix exception handlers in BL31: Use DSB to synchronize pending EA by Madhukar Pappireddy · 4 years, 1 month ago
- 2b0ee97 el3_runtime: Rearrange context offset of EL1 sys registers by Manish V Badarkhe · 4 years, 1 month ago
- 0c16abd Fix exception in save/restore of EL2 registers. by Max Shvetsov · 4 years, 3 months ago
- d102752 include: fixup 'cm_setup_context' prototype by Varun Wadekar · 4 years, 5 months ago
- 1962891 context: TPIDR_EL2 register not saved/restored by Olivier Deprez · 4 years, 5 months ago
- c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · 4 years, 6 months ago
- bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · 4 years, 6 months ago
- 91d8061 coverity: fix MISRA violations by Zelalem · 4 years, 6 months ago
- 1c819c3 Use correct type when reading SCR register by Louis Mayencourt · 4 years, 7 months ago
- f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · 5 years ago
- 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · 5 years ago
- 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · 5 years ago
- 8e0ef0f Switch AARCH32/AARCH64 to __aarch64__ by Julius Werner · 5 years ago
- 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · 5 years ago
- fb6f2fc Merge pull request #1751 from vwadekar/tegra-scatter-file-support by Antonio Niño Díaz · 5 years ago
- 56b68ad Minor changes to documentation and comments by Antonio Nino Diaz · 5 years ago
- 4d034c5 Tegra: Support for scatterfile for the BL31 image by Varun Wadekar · 6 years ago
- 594811b Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · 6 years ago
- 13adfb1 Cleanup context handling library by Antonio Nino Diaz · 6 years ago
- e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
- 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · 6 years ago
- 864ca6f context_mgmt: Fix MISRA defects by Antonio Nino Diaz · 6 years ago
- 9fe40fd Fix MISRA defects in workaround and errata framework by Antonio Nino Diaz · 6 years ago
- b4dee44 context_mgmt: Remove deprecated interfaces by Antonio Nino Diaz · 6 years ago
- 32ceef5 SDEI: MISRA fixes by Jeenu Viswambharan · 6 years ago
- bb1fd5b SDEI: Ensure SDEI handler executes with CVE-2018-3639 mitigation enabled by Dimitris Papastamos · 6 years ago
- fe5c421 Merge pull request #1392 from dp-arm/dp/cve_2018_3639 by Dimitris Papastamos · 6 years ago
- 28dce9e context_mgmt: Make cm_init_context_common public by Antonio Nino Diaz · 6 years ago
- ba51d9e Add support for dynamic mitigation for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
- 96c7df0 AArch64: Introduce External Abort handling by Jeenu Viswambharan · 7 years ago
- 0571270 Fix MISRA rule 8.4 in common code by Roberto Vargas · 7 years ago
- b63c6f1 Optimize/cleanup BPIALL workaround by Dimitris Papastamos · 7 years ago
- fa2b736 Merge pull request #1197 from dp-arm/dp/amu by davidcunado-arm · 7 years ago
- d1a1841 Add PubSub events for CPU powerdown/powerup by Dimitris Papastamos · 7 years ago
- c52ebdc Workaround for CVE-2017-5715 on Cortex A73 and A75 by Dimitris Papastamos · 7 years ago
- 5bdbb47 Refactor Statistical Profiling Extensions implementation by Dimitris Papastamos · 7 years ago
- d1a1fd4 Move FPEXC32_EL2 to FP Context by David Cunado · 7 years ago
- 10a6727 BL31: Introduce Exception Handling Framework by Jeenu Viswambharan · 7 years ago
- 31ea969 Merge pull request #1151 from JoelHutton/jh/MISRA-Mandatory by davidcunado-arm · 7 years ago
- 43a4d57 Change sizeof to use type of struct not function by Joel Hutton · 7 years ago
- a7921b9 aarch64: Add PubSub events to capture security state transitions by Dimitris Papastamos · 7 years ago
- 55e56a9 PSCI: Publish CPU ON event by Jeenu Viswambharan · 7 years ago
- e3f2200 BL31: Introduce Publish and Subscribe framework by Jeenu Viswambharan · 7 years ago
- 4168f2f Init and save / restore of PMCR_EL0 / PMCR by David Cunado · 7 years ago
- 97ad6ce cpu log buffer size depends on cache line size by Etienne Carriere · 7 years ago
- 09bb548 Merge pull request #978 from etienne-lms/minor-build by danh-arm · 7 years ago
- 662bf93 context_mgmt: declare extern cm_set_next_context() for AArch32 by Etienne Carriere · 7 years ago
- ee3457b aarch64: Enable Statistical Profiling Extensions for lower ELs by dp-arm · 7 years ago
- c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · 7 years ago
- 6715485 Merge pull request #927 from jeenu-arm/state-switch by davidcunado-arm · 7 years ago
- bc1a929 Introduce ARM SiP service to switch execution state by Jeenu Viswambharan · 8 years ago
- fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
- 3759e3f Control inclusion of helper code used for asserts by Antonio Nino Diaz · 7 years ago
- b911cc7 Re-factor header files for easier PSCI library integration by Soby Mathew · 8 years ago
- 3cac786 Add PMF instrumentation points in TF by dp-arm · 8 years ago
- 5d36121 AArch32: Add generic changes in BL1 by Yatharth Kochar · 8 years ago
- 748be1d AArch32: Add support in TF libraries by Soby Mathew · 8 years ago
- 0d78607 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · 8 years ago