1. b1335b7 refactor(cpus): add Cortex-A57 errata framework information by Boyan Karatotev · 1 year, 5 months ago
  2. ed1cc20 fix(cpus): flush L2 cache for Cortex-A7/12/15/17 by Stephan Gerhold · 1 year, 4 months ago
  3. eee28e7 chore: update to use Arm word across TF-A by Govindraj Raja · 11 months ago
  4. 4019f95 Merge changes from topic "sm/errata_refactor" into integration by Bipin Ravi · 11 months ago
  5. d7c07d1 refactor(cpus): convert Cortex-A15 to use the errata framework by Sona Mathew · 1 year ago
  6. 2a6af38 refactor(cpus): convert the Cortex-A5 to use the errata framework by Boyan Karatotev · 1 year, 3 months ago
  7. b19bb85 refactor(cpus): use cpu errata wrappers Cortex-A12 aarch32 cpu by Govindraj Raja · 1 year, 1 month ago
  8. 8fab3b3 refactor(cpus): use cpu errata wrappers Cortex-A7 and A9 aarch32 cpus by Govindraj Raja · 1 year, 2 months ago
  9. 5716493 fix(cpus): fix minor issue seen with a9 cpu by Govindraj Raja · 12 months ago
  10. d3a63a3 Merge changes from topic "hm/errata-fw" into integration by Bipin Ravi · 11 months ago
  11. 0dd7114 refactor(cpus): add Cortex-A53 errata framework information by Jayanth Dodderi Chidanand · 1 year, 3 months ago
  12. 44f985d refactor(cpus): add Cortex-A17 errata framework information by Harrison Mutai · 1 year ago
  13. 3318802 fix(fvp): resolve broken workaround reference by Harrison Mutai · 1 year ago
  14. 3c0edf8 refactor(cpus): add Cortex-A72 errata information by Maksims Svecovs · 1 year, 2 months ago
  15. de9df8e refactor(cpus): add Cortex-A32 errata framework information by Kathleen Capella · 1 year, 1 month ago
  16. 06236c9 refactor(cpus): convert print_errata_status to C by Boyan Karatotev · 1 year, 5 months ago
  17. e7d7c27 refactor(cpus): move cpu_ops field defines to a header by Boyan Karatotev · 1 year, 5 months ago
  18. 11b9b49 refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3 by Arvind Ram Prakash · 1 year, 7 months ago
  19. 7550aa2 fix(security): report CVE 2022 23960 missing for aarch32 A57 and A72 by John Powell · 2 years, 2 months ago
  20. 7f7c6fa fix(security): update Cortex-A15 CPU lib files for CVE-2022-23960 by John Powell · 2 years, 3 months ago
  21. b580095 lib: cpus: aarch32: sanity check pointers before use by Yann Gautier · 3 years, 4 months ago
  22. 26d1676 Cortex A9:errata 794073 workaround by Joel Hutton · 5 years ago
  23. fa5c951 Cortex-A17: Implement workaround for errata 852423 by Ambroise Vincent · 5 years ago
  24. 8cf9eef Cortex-A17: Implement workaround for errata 852421 by Ambroise Vincent · 5 years ago
  25. 68b3812 Cortex-A15: Implement workaround for errata 827671 by Ambroise Vincent · 5 years ago
  26. d4a51eb Cortex-A15: Implement workaround for errata 816470 by Ambroise Vincent · 5 years ago
  27. dbb0db6 Fixup register handling in aarch32 reset_handler by Heiko Stuebner · 5 years ago
  28. fb6f2fc Merge pull request #1751 from vwadekar/tegra-scatter-file-support by Antonio Niño Díaz · 5 years ago
  29. f5fdfbc Cortex-A53: Workarounds for 819472, 824069 and 827319 by Ambroise Vincent · 5 years ago
  30. aa2c029 Cortex-A57: Implement workaround for erratum 817169 by Ambroise Vincent · 5 years ago
  31. 1b0db76 Cortex-A57: Implement workaround for erratum 814670 by Ambroise Vincent · 5 years ago
  32. 4d034c5 Tegra: Support for scatterfile for the BL31 image by Varun Wadekar · 5 years ago
  33. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  34. 0980dce Make errata reporting mandatory for CPU files by Soby Mathew · 6 years ago
  35. 4a284a4 aarch32: Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  36. d1e1930 Fixup AArch32 errata printing framework by Soby Mathew · 6 years ago
  37. 04285cf Merge pull request #1228 from dp-arm/dp/cve_2017_5715 by davidcunado-arm · 6 years ago
  38. 471fb9b Merge pull request #1229 from manojkumar-arm/manojkumar-arm/ca72-aarch32-reset-fix by davidcunado-arm · 6 years ago
  39. e37c029 lib/cpus: fix branching in reset function for cortex-a72 AARCH32 mode by Manoj Kumar · 6 years ago
  40. 8ca0af2 Workaround for CVE-2017-5715 for Cortex A9, A15 and A17 by Dimitris Papastamos · 6 years ago
  41. e0e9946 bl2-el3: Add BL2_EL3 image by Roberto Vargas · 7 years ago
  42. 4c24bb7 Merge pull request #1168 from matt2048/master by davidcunado-arm · 7 years ago
  43. 41b0094 Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS by Matt Ma · 7 years ago
  44. 09d26a6 ARMv7: introduce Cortex-A12 by Etienne Carriere · 7 years ago
  45. 010dd1f ARMv7: introduce Cortex-A17 by Etienne Carriere · 7 years ago
  46. f2f7b91 ARMv7: introduce Cortex-A7 by Etienne Carriere · 7 years ago
  47. 37f8cdc ARMv7: introduce Cortex-A5 by Etienne Carriere · 7 years ago
  48. a1249e0 ARMv7: introduce Cortex-A9 by Etienne Carriere · 7 years ago
  49. 4ece755 ARMv7: introduce Cortex-A15 by Etienne Carriere · 7 years ago
  50. c3b4ca1 Cortex-A72: Implement workaround for erratum 859971 by Eleanor Bonnici · 7 years ago
  51. 0c9bd27 Cortex-A57: Implement workaround for erratum 859972 by Eleanor Bonnici · 7 years ago
  52. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  53. 2b40ca6 aarch32: Implement errata workarounds for Cortex A57 by Dimitris Papastamos · 7 years ago
  54. 9c47a5a aarch32: Implement errata workarounds for Cortex A53 by Dimitris Papastamos · 7 years ago
  55. 370542e aarch32: Implement cpu_rev_var_hs() by Dimitris Papastamos · 7 years ago
  56. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  57. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  58. bf360df Merge pull request #910 from dp-arm/dp/AArch32-juno-port by davidcunado-arm · 7 years ago
  59. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · 8 years ago
  60. 7c65c1e Remove build option `ASM_ASSERTION` by Antonio Nino Diaz · 7 years ago
  61. 9d92e8c Replace ASM signed tests with unsigned by Douglas Raillard · 7 years ago
  62. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 7 years ago
  63. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  64. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  65. adb7027 AArch32: Fix the stack alignment issue by Soby Mathew · 8 years ago
  66. a4c219a AArch32: Add support for ARM Cortex-A32 MPCore Processor by Yatharth Kochar · 8 years ago
  67. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · 8 years ago
  68. 748be1d AArch32: Add support in TF libraries by Soby Mathew · 8 years ago