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git01.mediatek.com / filogic / atf / b540d46db2eb5762fad3ee3b65abf2d33ffa0ddb / services
  1. c93e21f Perform a cache flush after ENTER PSCI timestamp capture by dp-arm · Mon Oct 31 17:17:21 2016 +0000
  2. 3cac786 Add PMF instrumentation points in TF by dp-arm · Mon Sep 19 11:18:44 2016 +0100
  3. 8da8966 PSCI: Do psci_setup() as part of std_svc_setup() by Soby Mathew · Mon Sep 19 17:21:15 2016 +0100
  4. d019487 Introduce PSCI Library Interface by Soby Mathew · Fri Apr 29 19:01:30 2016 +0100
  5. 0d78607 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · Thu Mar 24 16:56:29 2016 +0000
  6. 24ab34f Fix coding guideline warnings by Soby Mathew · Tue May 03 17:11:42 2016 +0100
  7. a0fedc4 Rework type usage in Trusted Firmware by Soby Mathew · Thu Jun 16 14:52:04 2016 +0100
  8. 241ec6c Add optional PSCI STAT residency & count functions by Yatharth Kochar · Mon May 09 18:26:35 2016 +0100
  9. 82a720e opteed: assume aarch64 for optee by Ashutosh Singh · Fri May 27 15:51:17 2016 +0100
  10. 6a81641 PSCI: Add pwr_domain_pwr_down_wfi() hook in plat_psci_ops by Soby Mathew · Wed Apr 27 14:46:28 2016 +0100
  11. 391a76e Add 32 bit version of plat_get_syscnt_freq by Antonio Nino Diaz · Wed May 18 16:53:31 2016 +0100
  12. 7497bff Remove unused argument in psci_cpu_on_start() by Sandrine Bailleux · Mon Apr 25 09:28:43 2016 +0100
  13. 6181acb Validate psci_cpu_on_start() arguments by Sandrine Bailleux · Fri Apr 22 13:00:19 2016 +0100
  14. 3270b84 pass r0-r6 as part of smc param by Ashutosh Singh · Thu Mar 31 17:18:34 2016 +0100
  15. 1298e69 PSCI: Resolve GCC static analysis false positive by Soby Mathew · Tue Feb 02 14:23:10 2016 +0000
  16. ca37050 Fix PSCI CPU ON race when setting state to ON_PENDING by Soby Mathew · Tue Jan 26 11:47:53 2016 +0000
  17. 46dd170 Remove direct usage of __attribute__((foo)) by Soren Brinkmann · Thu Jan 14 10:11:05 2016 -0800
  18. f4119ec Miscellaneous doc fixes for v1.2 by Sandrine Bailleux · Thu Dec 17 13:58:58 2015 +0000
  19. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · Mon Dec 14 09:35:25 2015 +0000
  20. 7866424 TSP: Allow preemption of synchronous S-EL1 interrupt handling by Soby Mathew · Fri Nov 13 02:08:43 2015 +0000
  21. bec9851 Enable use of FIQs and IRQs as TSP interrupts by Soby Mathew · Thu Sep 03 18:29:38 2015 +0100
  22. bc91282 Unify interrupt return paths from TSP into the TSPD by Soby Mathew · Tue Sep 22 12:01:18 2015 +0100
  23. c5204fa Remove the IMF_READ_INTERRUPT_ID build option by Soby Mathew · Tue Oct 27 10:01:06 2015 +0000
  24. 5e1fa05 TLKD: pass results with TLK_RESUME_FID function ID by Varun Wadekar · Wed Oct 07 17:15:41 2015 +0530
  25. d50e7d9 PSCI: Update state only if CPU_OFF is not denied by SPD by Soby Mathew · Thu Oct 01 16:46:06 2015 +0100
  26. a70dec3 Send power management events to the Trusted OS (TLK) by Varun Wadekar · Wed Aug 26 12:49:03 2015 +0530
  27. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · Fri Sep 11 16:03:13 2015 +0100
  28. a31c9f3 Merge pull request #390 from vikramkanigiri/at/unify_bakery_locks_v2 by Achin Gupta · Mon Sep 14 21:49:10 2015 +0100
  29. e466c9f Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · Thu Sep 10 11:39:36 2015 +0100
  30. 9a0ff9b Pass the target suspend level to SPD suspend hooks by Achin Gupta · Mon Sep 07 20:43:27 2015 +0100
  31. 3543c7b Merge pull request #361 from achingupta/for_sm/psci_proto_v5 by Achin Gupta · Mon Aug 17 14:56:31 2015 +0100
  32. 011ca18 PSCI: Rework generic code to conform to coding guidelines by Soby Mathew · Wed Jul 29 17:05:03 2015 +0100
  33. f1f97a1 PSCI: Fix the return code for invalid entrypoint by Soby Mathew · Wed Jul 15 12:13:26 2015 +0100
  34. da43b66 PSCI: Migrate SPDs and TSP to the new platform and framework API by Soby Mathew · Wed Jul 08 21:45:46 2015 +0100
  35. 981487a PSCI: Switch to the new PSCI frameworks by Soby Mathew · Mon Jul 13 14:10:57 2015 +0100
  36. 49473e4 PSCI: Implement platform compatibility layer by Soby Mathew · Wed Jun 10 13:49:59 2015 +0100
  37. 574d685 PSCI: Unify warm reset entry points by Sandrine Bailleux · Thu Jun 11 10:46:48 2015 +0100
  38. 85dbf5a PSCI: Add framework to handle composite power states by Soby Mathew · Tue Apr 07 12:16:56 2015 +0100
  39. 9d754f6 PSCI: Introduce new platform interface to describe topology by Soby Mathew · Wed Apr 08 17:42:06 2015 +0100
  40. b0082d2 PSCI: Introduce new platform and CM helper APIs by Soby Mathew · Thu Apr 09 13:40:55 2015 +0100
  41. 3a9e8bf PSCI: Remove references to affinity based power management by Soby Mathew · Tue May 05 16:33:16 2015 +0100
  42. 6b8b302 PSCI: Invoke PM hooks only for the highest level by Soby Mathew · Tue Jun 30 11:00:24 2015 +0100
  43. 991d42c PSCI: Create new directory to implement new frameworks by Soby Mathew · Mon Jun 29 16:30:12 2015 +0100
  44. f5bd697 tlkd: delete 'NEED_BL32' build variable by Varun Wadekar · Fri Jul 24 18:00:33 2015 +0530
  45. 2e0764b Merge pull request #324 from soby-mathew/sm/sys_suspend by danh-arm · Thu Jul 02 16:17:11 2015 +0100
  46. 9ccbc03 Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1 by danh-arm · Wed Jun 24 11:23:33 2015 +0100
  47. 9616838 PSCI: Add SYSTEM_SUSPEND API support by Soby Mathew · Wed Dec 17 14:47:57 2014 +0000
  48. 33e7d6a Fix integer extension in mpidr_set_aff_inst() by Andrew Thoelke · Thu Jun 11 14:22:07 2015 +0100
  49. 449dbd5 Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · Tue Jun 02 17:19:43 2015 +0100
  50. acde8b0 Rationalize reset handling code by Sandrine Bailleux · Tue May 19 11:54:45 2015 +0100
  51. 22fa7e4 PSCI: Set ON_PENDING state early during CPU_ON by Soby Mathew · Mon May 11 23:15:06 2015 +0100
  52. ebfeae9 Pass arguments/results between EL3/S-EL1 via CPU registers (x0-x7) by Varun Wadekar · Thu Apr 02 14:57:47 2015 +0530
  53. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
  54. 2eb68ca Merge pull request #280 from vwadekar/tlkd-fixed-v3 by danh-arm · Wed Apr 01 11:36:08 2015 +0100
  55. b539b6c Open/Close TA sessions, send commands/events to TAs by Varun Wadekar · Fri Mar 13 15:18:20 2015 +0530
  56. 968c029 Preempt/Resume standard function ID calls by Varun Wadekar · Fri Mar 13 15:10:54 2015 +0530
  57. 97625e3 Translate secure/non-secure virtual addresses by Varun Wadekar · Fri Mar 13 14:59:03 2015 +0530
  58. a97535f Register NS shared memory for SP's activity logs and TA sessions by Varun Wadekar · Fri Mar 13 14:19:11 2015 +0530
  59. 3d4e6a5 Add TLK Dispatcher (tlkd) based on the Test Dispatcher (tspd) by Varun Wadekar · Fri Mar 13 14:01:03 2015 +0530
  60. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · Thu Jan 29 18:27:38 2015 +0000
  61. a64a854 Fix violations to the coding style by Sandrine Bailleux · Thu Mar 05 10:54:34 2015 +0000
  62. 2b7de2b Export maximum affinity using PLATFORM_MAX_AFFLVL macro by Soby Mathew · Thu Feb 12 14:45:02 2015 +0000
  63. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · Thu Nov 20 18:09:41 2014 +0000
  64. 47903c0 Demonstrate model for routing IRQs to EL3 by Soby Mathew · Tue Jan 13 15:48:26 2015 +0000
  65. 61e615b Verify capabilities before handling PSCI calls by Soby Mathew · Thu Jan 15 11:49:49 2015 +0000
  66. 6cdddaf Implement PSCI_FEATURES API by Soby Mathew · Wed Jan 07 11:10:22 2015 +0000
  67. 110fe36 Rework the PSCI migrate APIs by Soby Mathew · Thu Oct 23 10:35:34 2014 +0100
  68. 26fb90e Return success if an interrupt is seen during PSCI CPU_SUSPEND by Soby Mathew · Tue Jan 06 21:36:55 2015 +0000
  69. 74e52a7 Validate power_state and entrypoint when executing PSCI calls by Soby Mathew · Thu Oct 02 16:56:51 2014 +0100
  70. f512157 Save 'power_state' early in PSCI CPU_SUSPEND call by Soby Mathew · Tue Sep 30 11:19:51 2014 +0100
  71. 8595b87 Rework internal API to save non-secure entry point info by Soby Mathew · Tue Jan 06 15:36:38 2015 +0000
  72. 5f2c1b3 PSCI: Check early for invalid CPU state during CPU ON by Soby Mathew · Mon Jan 12 13:01:31 2015 +0000
  73. ffb4ab1 Remove `ns_entrypoint` and `mpidr` from parameters in pm_ops by Soby Mathew · Fri Sep 26 15:08:52 2014 +0100
  74. 2ae2043 Remove coherent memory from the BL memory maps by Soby Mathew · Thu Jan 08 18:02:44 2015 +0000
  75. 523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · Thu Jan 08 18:02:19 2015 +0000
  76. 7d861ea Invalidate the dcache after initializing cpu-ops by Soby Mathew · Tue Nov 18 10:14:14 2014 +0000
  77. 2b69750 Fix CPU_SUSPEND when invoked with affinity level higher than get_max_afflvl() by Soby Mathew · Thu Oct 02 17:24:19 2014 +0100
  78. e2b2d8f Fix the array size of mpidr_aff_map_nodes_t. by Soby Mathew · Thu Dec 04 14:14:12 2014 +0000
  79. c288886 Add opteed based on tspd by Jens Wiklander · Mon Aug 04 15:39:58 2014 +0200
  80. 8e2f287 Add CPU specific power management operations by Soby Mathew · Thu Aug 14 12:49:05 2014 +0100
  81. 56bcdc2 Miscellaneous PSCI code cleanups by Achin Gupta · Mon Jul 28 00:15:23 2014 +0100
  82. f6b9e99 Add APIs to preserve highest affinity level in OFF state by Achin Gupta · Thu Jul 31 11:19:11 2014 +0100
  83. cab78e4 Rework state management in the PSCI implementation by Achin Gupta · Mon Jul 28 00:09:01 2014 +0100
  84. f3ccbab Add PSCI service specific per-CPU data by Achin Gupta · Fri Jul 25 14:52:47 2014 +0100
  85. 4dc4a47 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · Tue Aug 12 11:17:06 2014 +0100
  86. 9e46188 Merge pull request #189 from achingupta/ag/tf-issues#153 by Dan Handley · Tue Aug 19 11:04:21 2014 +0100
  87. 4fd2f5c Clarify platform porting interface to TSP by Dan Handley · Mon Aug 04 11:41:20 2014 +0100
  88. ed1744e Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · Mon Aug 04 23:13:10 2014 +0100
  89. 6dc22e3 Merge pull request #178 from soby-mathew/sm/optmize_el3_context by danh-arm · Mon Aug 04 10:31:54 2014 +0100
  90. 4e81341 Support asynchronous method for BL3-2 initialization by Vikram Kanigiri · Tue Jul 15 16:49:22 2014 +0100
  91. 9d70f0f Rework the TSPD setup code by Vikram Kanigiri · Tue Jul 15 16:46:43 2014 +0100
  92. 2ed46e9 Optimize EL3 register state stored in cpu_context structure by Soby Mathew · Fri Jul 04 16:02:26 2014 +0100
  93. 5cd545d Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · Mon Jul 28 14:33:44 2014 +0100
  94. f558cac Rework incorrect use of assert() and panic() in codebase by Juan Castillo · Thu Jun 05 09:45:36 2014 +0100
  95. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · Fri Jul 18 18:38:28 2014 +0100
  96. 9c60d80 Remove the concept of coherent stacks by Achin Gupta · Thu Jun 26 11:12:37 2014 +0100
  97. e1aa516 Remove coherent stack usage from the warm boot path by Achin Gupta · Thu Jun 26 09:58:52 2014 +0100
  98. e998254 Make enablement of the MMU more flexible by Achin Gupta · Thu Jun 26 08:59:07 2014 +0100
  99. 2bc0785 Remove current CPU mpidr from PSCI common code by Andrew Thoelke · Mon Jun 09 12:44:21 2014 +0100
  100. 3c74a44 Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · Tue Jun 24 16:48:31 2014 +0100