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git01.mediatek.com / filogic / atf / b45f15e9e782af911d14a6a50f881bef1bf880b6 / plat / renesas / rcar / plat_pm.c
  1. 1c819c3 Use correct type when reading SCR register by Louis Mayencourt · 4 years, 10 months ago
  2. b67a8ca rcar_gen3: drivers: Change to restore timer counter value at resume by Toshiyuki Ogasahara · 6 years ago
  3. 4ae342c rcar_gen3: plat: Add initial D3 support by Marek Vasut · 6 years ago
  4. 122555f rcar_gen3: plat: Add missing cpu_on_check() implementation by Marek Vasut · 6 years ago
  5. 38ec9e5 rcar_gen3: drivers: cpld: Move rcar_cpld_reset_cpu() into header by Marek Vasut · 6 years ago
  6. e724649 rcar_gen3: plat: Clean up rcar_pwrc_code_copy_to_system_ram() by Marek Vasut · 6 years ago
  7. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · 6 years ago
  8. bf084dc rcar-gen3: initial commit for the rcar-gen3 boards by Jorge Ramirez-Ortiz · 6 years ago