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git01.mediatek.com / filogic / atf / b3dbeb007c22c4786d8feb9ae0fec052c2e18210 / include
  1. 5cd545d Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · Mon Jul 28 14:33:44 2014 +0100
  2. 45c31c4 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · Mon Jul 28 14:28:40 2014 +0100
  3. 3299181 Merge pull request #170 from achingupta/ag/tf-issues#226 by danh-arm · Mon Jul 28 14:27:25 2014 +0100
  4. 289162c Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · Mon Jul 28 14:24:52 2014 +0100
  5. f558cac Rework incorrect use of assert() and panic() in codebase by Juan Castillo · Thu Jun 05 09:45:36 2014 +0100
  6. 0da9593 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · Wed Jul 16 09:23:52 2014 +0100
  7. c1adbbc Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · Wed Jun 25 10:07:40 2014 +0100
  8. 041f62a Implement an assert() callable from assembly code by Soby Mathew · Mon Jul 14 16:58:03 2014 +0100
  9. 066f713 Introduce crash console APIs for crash reporting by Soby Mathew · Mon Jul 14 16:57:23 2014 +0100
  10. 69817f7 Parametrize baudrate and UART clock during console_init() by Soby Mathew · Mon Jul 14 15:43:21 2014 +0100
  11. c389d77 Introduce asm console functions in TF by Soby Mathew · Tue Jun 24 12:28:41 2014 +0100
  12. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · Fri Jul 18 18:38:28 2014 +0100
  13. 04be3a5 Add support for printing version at runtime by Juan Castillo · Mon Jun 30 11:41:46 2014 +0100
  14. afe7e2f Implement a leaner printf for Trusted Firmware by Soby Mathew · Thu Jun 12 17:23:58 2014 +0100
  15. e1aa516 Remove coherent stack usage from the warm boot path by Achin Gupta · Thu Jun 26 09:58:52 2014 +0100
  16. e998254 Make enablement of the MMU more flexible by Achin Gupta · Thu Jun 26 08:59:07 2014 +0100
  17. 47a6483 Merge pull request #162 from jcastillo-arm/jc/tf-issues/194 by danh-arm · Fri Jul 11 14:17:05 2014 +0100
  18. cfa5e84 Merge pull request #164 from sandrine-bailleux/sb/bl30-support-v2 by danh-arm · Fri Jul 11 14:16:13 2014 +0100
  19. f841ef0 Add support for BL3-0 image by Sandrine Bailleux · Tue Jun 24 14:19:36 2014 +0100
  20. e8e04ec Merge pull request #157 from sandrine-bailleux/sb/tf-issue-109 by danh-arm · Thu Jul 10 14:45:19 2014 +0100
  21. 49db8c2 Merge pull request #146 from danh-arm/dh/refactor-fvp-gic by danh-arm · Thu Jul 10 14:44:24 2014 +0100
  22. 258e94f Allow FP register context to be optional at build time by Juan Castillo · Wed Jun 25 17:26:36 2014 +0100
  23. fb42b12 Refactor fvp gic code to be a generic driver by Dan Handley · Fri Jun 20 09:43:15 2014 +0100
  24. 1c54d97 Refactor fvp_config into common platform header by Dan Handley · Fri Jun 20 12:02:01 2014 +0100
  25. 741a382 Calculate TCR bits based on VA and PA by Lin Ma · Fri Jun 27 16:56:30 2014 -0700
  26. 467d057 Remove concept of top/bottom image loading by Sandrine Bailleux · Tue Jun 24 14:02:34 2014 +0100
  27. 22129f5 Merge pull request #154 from athoelke/at/inline-mmio by Andrew Thoelke · Thu Jun 26 23:02:28 2014 +0100
  28. 3c74a44 Merge pull request #152 from jcastillo-arm/jc/tf-issues/073-v2 by danh-arm · Tue Jun 24 16:48:31 2014 +0100
  29. 42970b0 Merge pull request #147 from athoelke/at/remove-bakery-mpidr by danh-arm · Tue Jun 24 16:44:12 2014 +0100
  30. af9dd82 Inline the mmio accessor functions by Andrew Thoelke · Tue Jun 24 14:18:35 2014 +0100
  31. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · Fri Jun 13 17:05:10 2014 +0100
  32. 958cc02 Remove calling CPU mpidr from bakery lock API by Andrew Thoelke · Mon Jun 09 12:54:15 2014 +0100
  33. 56f4470 Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · Fri Jun 20 00:36:14 2014 +0100
  34. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · Wed Jun 04 21:10:52 2014 +0100
  35. 40110f7 Merge pull request #138 from athoelke/at/cpu-context by danh-arm · Mon Jun 23 13:10:00 2014 +0100
  36. 4d2d553 Remove early_exceptions from BL3-1 by Andrew Thoelke · Mon Jun 02 12:38:12 2014 +0100
  37. c02dbd6 Move CPU context pointers into cpu_data by Andrew Thoelke · Mon Jun 02 10:00:25 2014 +0100
  38. 8c28fe0 Per-cpu data cache restructuring by Andrew Thoelke · Mon Jun 02 11:40:35 2014 +0100
  39. d25686a Merge pull request #131 from athoelke/at/cm_get_context by danh-arm · Mon Jun 16 12:41:58 2014 +0100
  40. ddb312d Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · Mon Jun 16 12:41:48 2014 +0100
  41. a2f6553 Provide cm_get/set_context() for current CPU by Andrew Thoelke · Wed May 14 17:09:32 2014 +0100
  42. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · Mon Jun 02 15:44:43 2014 +0100
  43. 1359236 Enable mapping higher physical address by Lin Ma · Mon Jun 02 11:45:36 2014 -0700
  44. 701fea7 Further renames of platform porting functions by Dan Handley · Tue May 27 16:17:21 2014 +0100
  45. 2159ef4 Remove FVP specific comments in platform.h by Dan Handley · Tue May 27 15:39:41 2014 +0100
  46. b226a4d Add enable mmu platform porting interfaces by Dan Handley · Fri May 16 14:08:45 2014 +0100
  47. 7ce42df Move BL porting functions into platform.h by Dan Handley · Thu May 15 14:11:36 2014 +0100
  48. ed6ff95 Split platform.h into separate headers by Dan Handley · Wed May 14 17:44:19 2014 +0100
  49. 60b13e3 Remove unused data declarations by Dan Handley · Wed May 14 15:13:16 2014 +0100
  50. a17fefa Remove extern keyword from function declarations by Dan Handley · Wed May 14 12:38:32 2014 +0100
  51. 332ff85 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  52. 077193f Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  53. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  54. 29c7ae1 Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  55. 1c5630d Merge pull request #67 from achingupta:ag/psci_standby_bug_fix by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  56. 891c4ca Use a vector table for TSP entrypoints by Andrew Thoelke · Tue May 20 21:43:27 2014 +0100
  57. 9f71f70 Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · Fri May 09 20:49:17 2014 +0100
  58. aeaab68 Add S-EL1 interrupt handling support in the TSPD by Achin Gupta · Fri May 09 13:21:31 2014 +0100
  59. 7671789 Add support for synchronous FIQ handling in TSP by Achin Gupta · Fri May 09 11:42:56 2014 +0100
  60. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · Fri May 09 12:00:17 2014 +0100
  61. 9cf2bb7 Introduce interrupt handling framework in BL3-1 by Achin Gupta · Fri May 09 11:07:09 2014 +0100
  62. 02d3628 Introduce platform api to access an ARM GIC by Achin Gupta · Sun May 04 19:02:52 2014 +0100
  63. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · Fri May 09 10:03:15 2014 +0100
  64. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · Sun May 04 18:38:28 2014 +0100
  65. 9637745 Add support for BL3-1 as a reset vector by Vikram Kanigiri · Thu Apr 24 11:02:16 2014 +0100
  66. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · Fri May 16 18:48:12 2014 +0100
  67. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · Tue Apr 15 18:08:08 2014 +0100
  68. a3a5e4a Rework handover interface between BL stages by Vikram Kanigiri · Thu May 15 18:27:15 2014 +0100
  69. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · Tue May 13 14:42:08 2014 +0100
  70. 8782852 Merge pull request #91 from linmaonly/lin_dev by Andrew Thoelke · Thu May 22 12:31:20 2014 +0100
  71. 0b9d59f Address issue 156: 64-bit addresses get truncated by Lin Ma · Tue May 20 11:25:55 2014 -0700
  72. b058556 Merge pull request #78 from jeenuv:tf-issues-148 by Andrew Thoelke · Mon May 19 12:54:05 2014 +0100
  73. d1b6015 Add build configuration for timer save/restore by Jeenu Viswambharan · Mon May 12 15:28:47 2014 +0100
  74. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · Mon Apr 07 15:28:55 2014 +0100
  75. 42c5280 Fix broken standby state implementation in PSCI by Achin Gupta · Fri May 09 19:32:25 2014 +0100
  76. 25232af Introduce IS_IN_ELX() macros by Sandrine Bailleux · Fri May 09 11:23:11 2014 +0100
  77. 9ceff0f Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1 by danh-arm · Thu May 08 12:25:02 2014 +0100
  78. 6c5192a Preserve x19-x29 across world switch for exception handling by Soby Mathew · Wed Apr 30 15:36:37 2014 +0100
  79. 6bdfa91 Merge pull request #58 from athoelke/optimise-cache-flush-v2 by danh-arm · Thu May 08 12:01:10 2014 +0100
  80. 86f0665 Merge pull request #61 from athoelke/use-mrs-msr-from-assembler-v2 by danh-arm · Thu May 08 12:00:10 2014 +0100
  81. 99cb464 Merge pull request #60 from athoelke/disable-mmu-v2 by danh-arm · Thu May 08 11:55:19 2014 +0100
  82. aa3266a Remove unused 'PL011_BASE' macro by Sandrine Bailleux · Tue May 06 13:25:37 2014 +0100
  83. 6a5b3a4 Optimise data cache clean/invalidate operation by Andrew Thoelke · Fri Apr 25 10:49:30 2014 +0100
  84. 5879ffd Remove unused or invalid asm helper functions by Andrew Thoelke · Mon Apr 28 12:33:52 2014 +0100
  85. f977ed8 Access system registers directly in assembler by Andrew Thoelke · Mon Apr 28 12:32:02 2014 +0100
  86. 438c63a Replace disable_mmu with assembler version by Andrew Thoelke · Mon Apr 28 12:06:18 2014 +0100
  87. a4cb68e Remove variables from .data section by Dan Handley · Wed Apr 23 13:47:06 2014 +0100
  88. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · Wed Apr 09 13:14:54 2014 +0100
  89. e2712bc Always use named structs in header files by Dan Handley · Thu Apr 10 15:37:22 2014 +0100
  90. 27f6e7d Move PSCI global functions out of private header by Dan Handley · Wed Apr 23 15:22:18 2014 +0100
  91. bcd60ba Separate BL functions out of arch.h by Dan Handley · Thu Apr 17 18:53:42 2014 +0100
  92. 930ee2e Refactor GIC header files by Dan Handley · Thu Apr 17 17:48:52 2014 +0100
  93. f3c8f32 Separate out CASSERT macro into own header by Dan Handley · Thu Apr 17 17:29:58 2014 +0100
  94. 714a0d2 Make use of user/system includes more consistent by Dan Handley · Wed Apr 09 13:13:04 2014 +0100
  95. 4d2e49d Move FVP power driver to FVP platform by Dan Handley · Fri Apr 11 11:52:12 2014 +0100
  96. a70615f Move include and source files to logical locations by Dan Handley · Wed Apr 09 12:48:25 2014 +0100
  97. f100f41 Preserve PSCI cpu_suspend 'power_state' parameter. by Vikram Kanigiri · Tue Apr 01 19:26:26 2014 +0100
  98. afd1ec7 Add TrustZone (TZC-400) driver by Harry Liebel · Tue Apr 01 19:19:22 2014 +0100
  99. 65668f9 Allocate single stacks for BL1 and BL2 by Andrew Thoelke · Thu Mar 20 10:48:23 2014 +0000
  100. a686542 Merge pull request #36 from athoelke/at/gc-sections-80 by danh-arm · Tue Apr 15 09:39:47 2014 +0100