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filogic
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atf
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b26da3ca52d07798bd6028c4231df3eb563cef05
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lib
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cpus
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aarch64
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neoverse_n1.S
8b8b13b
DSU: Apply erratum 936184 for Neoverse N1/E1
by Louis Mayencourt
· Mon Jun 10 16:43:39 2019 +0100
401cc1f
Merge "Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703" into integration
by John Tsichritzis
· Fri Jun 07 15:20:45 2019 +0000
b934740
Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703
by Andre Przywara
· Mon May 20 14:57:06 2019 +0100
7557c66
Apply compile-time check for AArch64-only cores
by John Tsichritzis
· Mon Jun 03 13:54:30 2019 +0100
a8722e9
Disable speculative loads only if SSBS is supported
by Sami Mujawar
· Fri May 10 14:28:37 2019 +0100
fe6df39
Add compile-time errors for HW_ASSISTED_COHERENCY flag
by John Tsichritzis
· Tue Mar 19 17:20:52 2019 +0000
b58142b
Neoverse N1: Forces cacheable atomic to near
by Louis Mayencourt
· Thu Apr 18 14:34:11 2019 +0100
1f9ff49
Apply variant 4 mitigation for Neoverse N1
by John Tsichritzis
· Mon Mar 04 16:41:26 2019 +0000
56369c1
Rename Cortex-Ares to Neoverse N1
by John Tsichritzis
· Tue Feb 19 13:49:06 2019 +0000
97ff6d0
Rename Cortex-Ares filenames to Neoverse N1
by John Tsichritzis
· Tue Feb 19 13:48:44 2019 +0000
[Renamed from lib/cpus/aarch64/cortex_ares.S]
5e7e4a7
Fix the Cortex-ares errata reporting function name
by Soby Mathew
· Mon Sep 10 11:14:01 2018 +0100
7ca21db
Implement Cortex-Ares 1043202 erratum workaround
by Dimitris Papastamos
· Mon Mar 26 16:46:01 2018 +0100
89736dd
Add AMU support for Cortex-Ares
by Dimitris Papastamos
· Tue Feb 13 11:28:02 2018 +0000
ea84d6b
Add support for Cortex-Ares and Cortex-A76 CPUs
by Isla Mitchell
· Thu Aug 03 16:04:46 2017 +0100