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git01.mediatek.com / filogic / atf / af9dd82d5ae0d32a6ef31eab071bb70310b675b4
  1. af9dd82 Inline the mmio accessor functions by Andrew Thoelke · Tue Jun 24 14:18:35 2014 +0100
  2. fb06094 Merge pull request #145 from athoelke/at/psci-memory-optimization-v2 by danh-arm · Mon Jun 23 18:04:29 2014 +0100
  3. dc589aa Merge pull request #144 from athoelke/at/init-context-v2 by danh-arm · Mon Jun 23 18:02:36 2014 +0100
  4. 56f4470 Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · Fri Jun 20 00:36:14 2014 +0100
  5. e9a0d11 Eliminate psci_suspend_context array by Andrew Thoelke · Fri Jun 20 00:38:03 2014 +0100
  6. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · Wed Jun 04 21:10:52 2014 +0100
  7. f1c7cd7 Merge pull request #143 from athoelke/at/remove-nsram by danh-arm · Mon Jun 23 14:41:34 2014 +0100
  8. 4af473c Merge pull request #140 from athoelke/at/psci_smc_handler by danh-arm · Mon Jun 23 14:40:20 2014 +0100
  9. 40110f7 Merge pull request #138 from athoelke/at/cpu-context by danh-arm · Mon Jun 23 13:10:00 2014 +0100
  10. 37db22d Merge pull request #137 from athoelke/at/no-early-exceptions by danh-arm · Mon Jun 23 13:06:05 2014 +0100
  11. fb3fd02 Merge pull request #136 from athoelke/at/cpu-data by danh-arm · Mon Jun 23 12:47:47 2014 +0100
  12. 10ee89f Merge pull request #142 from athoelke/at/fix-console_putc by danh-arm · Mon Jun 23 12:43:58 2014 +0100
  13. 30b04fc Remove NSRAM from FVP memory map by Andrew Thoelke · Fri Jun 20 12:23:20 2014 +0100
  14. 560a3e5 Remove broken assertion in console_putc() by Andrew Thoelke · Fri Jun 20 11:12:39 2014 +0100
  15. 900def0 Merge pull request #135 from soby-mathew/sm/remove-reinit-of-timers by danh-arm · Wed Jun 18 18:34:31 2014 +0100
  16. bb12891 Remove re-initialisation of system timers after warm boot for FVP by Soby Mathew · Fri Jun 06 10:18:52 2014 +0100
  17. 0572273 Merge pull request #134 from jcastillo-arm/jc/tf-issues/179 by danh-arm · Tue Jun 17 15:12:14 2014 +0100
  18. 4d2d553 Remove early_exceptions from BL3-1 by Andrew Thoelke · Mon Jun 02 12:38:12 2014 +0100
  19. c02dbd6 Move CPU context pointers into cpu_data by Andrew Thoelke · Mon Jun 02 10:00:25 2014 +0100
  20. 8c28fe0 Per-cpu data cache restructuring by Andrew Thoelke · Mon Jun 02 11:40:35 2014 +0100
  21. d73898a Set correct value for SYS_ID_REV_SHIFT in FVP by Juan Castillo · Fri Jun 13 17:10:00 2014 +0100
  22. e385767 Merge pull request #133 from athoelke/at/crash-reporting-opt by danh-arm · Mon Jun 16 12:45:08 2014 +0100
  23. d25686a Merge pull request #131 from athoelke/at/cm_get_context by danh-arm · Mon Jun 16 12:41:58 2014 +0100
  24. ddb312d Merge pull request #130 from athoelke/at/inline-asm-sysreg-v2 by danh-arm · Mon Jun 16 12:41:48 2014 +0100
  25. 14f6fa0 Merge pull request #128 from sandrine-bailleux/sb/make-load_image-ep-optional by danh-arm · Mon Jun 16 11:58:21 2014 +0100
  26. 978079b Merge pull request #127 from sandrine-bailleux/sb/fix-pl011-fifo-polling by achingupta · Thu Jun 12 09:15:06 2014 +0100
  27. 992d045 Merge pull request #126 from sandrine-bailleux/sb/include-missing-hfile by achingupta · Thu Jun 12 09:14:05 2014 +0100
  28. fdad706 Merge pull request #125 from sandrine-bailleux/sb/remove-bl2_el_change_mem_ptr by achingupta · Thu Jun 12 09:12:52 2014 +0100
  29. 385f4d4 Make the BL3-1 crash reporting optional by Andrew Thoelke · Tue Jun 03 11:50:53 2014 +0100
  30. a2f6553 Provide cm_get/set_context() for current CPU by Andrew Thoelke · Wed May 14 17:09:32 2014 +0100
  31. 3785c3e Merge Pull Request #120 (patch 1) from 'linmaonly:lin_patch2' by Andrew Thoelke · Tue Jun 10 23:33:07 2014 +0100
  32. 89a3c84 PSCI SMC handler improvements by Andrew Thoelke · Tue Jun 10 16:37:37 2014 +0100
  33. 3f78dc3 Make system register functions inline assembly by Andrew Thoelke · Mon Jun 02 15:44:43 2014 +0100
  34. 1c3e228 fvp: Remove unused 'bl2_el_change_mem_ptr' variable by Sandrine Bailleux · Thu May 29 13:55:51 2014 +0100
  35. 3ab33f3 Make the entry point argument optional in load_image() by Sandrine Bailleux · Wed May 28 11:31:18 2014 +0100
  36. efbd3b2 PL011: Fix a bug in the UART FIFO polling by Sandrine Bailleux · Mon Jun 02 13:52:38 2014 +0100
  37. af1ef2b Include 'platform_def.h' header file in 'crash_reporting.S' by Sandrine Bailleux · Tue May 27 15:46:07 2014 +0100
  38. 001f3cf Merge pull request #122 from 'danh-arm:dh/v0.4-docs' by Dan Handley · Tue Jun 03 18:50:13 2014 +0100
  39. dbdb7ff Merge pull request #124 from 'danh-arm:sm/imf-documentation' by Dan Handley · Tue Jun 03 18:48:27 2014 +0100
  40. b04412c Document design of the Interrupt Mangement Framework by Achin Gupta · Mon Jun 02 22:27:36 2014 +0100
  41. 8dc1219 Merge pull request #119 from 'soby-mathew:sm/doc_crash_reporting' by Dan Handley · Tue Jun 03 17:41:41 2014 +0100
  42. 593dea0 Merge pull request #117 from 'danh-arm:dh/v0.4-user-guide' by Dan Handley · Tue Jun 03 17:39:10 2014 +0100
  43. c677812 Merge pull request #121 'vikramkanigiri:vk/doc_for_133' by Dan Handley · Tue Jun 03 17:38:11 2014 +0100
  44. c45bf7a Documentation for BL3-1 hardening and reset vector by Vikram Kanigiri · Fri May 23 15:56:12 2014 +0100
  45. ff1c415 Trusted Firmware v0.4 release documentation by Dan Handley · Thu May 29 19:07:23 2014 +0100
  46. 3761028 User guide updates for v0.4 release by Dan Handley · Thu May 29 16:58:44 2014 +0100
  47. 1359236 Enable mapping higher physical address by Lin Ma · Mon Jun 02 11:45:36 2014 -0700
  48. b3d30b7 Documentation for the new crash reporting implementation by Soby Mathew · Fri May 23 17:05:43 2014 +0100
  49. c7388d3 Merge pull request #116 from 'danh-arm:dh/refactoring-docs' by Dan Handley · Fri May 30 17:33:06 2014 +0100
  50. 0b314cc Fix porting guide references to platform.h by Dan Handley · Thu May 29 12:30:24 2014 +0100
  51. df87323 Merge pull request #111 'soby-mathew-sm:fix_cookie_to_int_handler' by Dan Handley · Thu May 29 17:11:04 2014 +0100
  52. b86acb0 Merge pull request #115 'athoelke-at:fix-bl31-X1-parameter' by Dan Handley · Thu May 29 17:09:24 2014 +0100
  53. b8b9002 Merge pull request #114 from 'vikramkanigiri:vk/pass_bl33_args' by Dan Handley · Thu May 29 17:05:34 2014 +0100
  54. 93c89ec Fix compilation issue for IMF_READ_INTERRUPT_ID build flag by Soby Mathew · Wed May 28 17:14:36 2014 +0100
  55. 799f0ab Pass 'cookie' parameter to interrupt handler in BL3-1 by Soby Mathew · Tue May 27 16:54:31 2014 +0100
  56. a55566d Allow platform parameter X1 to be passed to BL3-1 by Andrew Thoelke · Wed May 28 22:22:55 2014 +0100
  57. 614f395 Pass the args to the BL3-3 entrypoint by Vikram Kanigiri · Wed May 28 13:41:51 2014 +0100
  58. 459df4c Merge pull request #110 from soby-mathew:sm/support_normal_irq_in_tsp-v4 into for-v0.4 by Dan Handley · Tue May 27 18:46:22 2014 +0100
  59. 10e2df2 Merge pull request #112 from danh-arm:dh/refactor-plat-header-v4 into for-v0.4 by Dan Handley · Tue May 27 18:34:30 2014 +0100
  60. 701fea7 Further renames of platform porting functions by Dan Handley · Tue May 27 16:17:21 2014 +0100
  61. 2159ef4 Remove FVP specific comments in platform.h by Dan Handley · Tue May 27 15:39:41 2014 +0100
  62. 3d57851 Fixup Standard SMC Resume Handling by Soby Mathew · Tue May 27 10:20:01 2014 +0100
  63. b226a4d Add enable mmu platform porting interfaces by Dan Handley · Fri May 16 14:08:45 2014 +0100
  64. ea45157 Rename FVP specific files and functions by Dan Handley · Thu May 15 14:53:30 2014 +0100
  65. 7ce42df Move BL porting functions into platform.h by Dan Handley · Thu May 15 14:11:36 2014 +0100
  66. ed6ff95 Split platform.h into separate headers by Dan Handley · Wed May 14 17:44:19 2014 +0100
  67. 60b13e3 Remove unused data declarations by Dan Handley · Wed May 14 15:13:16 2014 +0100
  68. a17fefa Remove extern keyword from function declarations by Dan Handley · Wed May 14 12:38:32 2014 +0100
  69. 335bf58 Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · Fri May 23 12:14:37 2014 +0100
  70. 5e9b3ab doc: Update information about the memory layout by Sandrine Bailleux · Wed May 21 17:08:26 2014 +0100
  71. 6c8b359 Make the memory layout more flexible by Sandrine Bailleux · Thu May 22 15:28:26 2014 +0100
  72. f748806 Make BL1 RO and RW base addresses configurable by Sandrine Bailleux · Thu May 22 15:21:35 2014 +0100
  73. 332ff85 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  74. 077193f Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  75. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  76. 31f0f8f Merge pull request #100 from jcastillo-arm:jc/tf-issues/149-v4 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  77. 44a07af Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  78. a83a38c Merge pull request #103 from athoelke:dh/tf-issues#68-v3 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  79. 29c7ae1 Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  80. 1c5630d Merge pull request #67 from achingupta:ag/psci_standby_bug_fix by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  81. aaa6ff8 Limit BL3-1 read/write access to SRAM by Andrew Thoelke · Thu May 22 13:44:47 2014 +0100
  82. 891c4ca Use a vector table for TSP entrypoints by Andrew Thoelke · Tue May 20 21:43:27 2014 +0100
  83. 9f71f70 Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · Fri May 09 20:49:17 2014 +0100
  84. 21a30ab Allow BL3-2 platform definitions to be optional by Dan Handley · Tue Apr 15 11:38:38 2014 +0100
  85. bbc33f2 Enable secure timer to generate S-EL1 interrupts by Achin Gupta · Fri May 09 13:33:42 2014 +0100
  86. aeaab68 Add S-EL1 interrupt handling support in the TSPD by Achin Gupta · Fri May 09 13:21:31 2014 +0100
  87. a4f50c2 Add support for asynchronous FIQ handling in TSP by Achin Gupta · Fri May 09 12:17:56 2014 +0100
  88. 7671789 Add support for synchronous FIQ handling in TSP by Achin Gupta · Fri May 09 11:42:56 2014 +0100
  89. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · Fri May 09 12:00:17 2014 +0100
  90. 9cf2bb7 Introduce interrupt handling framework in BL3-1 by Achin Gupta · Fri May 09 11:07:09 2014 +0100
  91. 02d3628 Introduce platform api to access an ARM GIC by Achin Gupta · Sun May 04 19:02:52 2014 +0100
  92. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · Fri May 09 10:03:15 2014 +0100
  93. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · Sun May 04 18:38:28 2014 +0100
  94. 18d6eaf Rework 'state' field usage in per-cpu TSP context by Achin Gupta · Sun May 04 18:23:26 2014 +0100
  95. fcf9765 Doc: Add the "Building the Test Secure Payload" section by Sandrine Bailleux · Wed May 14 16:45:27 2014 +0100
  96. e701e30 fvp: Move TSP from Secure DRAM to Secure SRAM by Sandrine Bailleux · Tue May 20 17:28:25 2014 +0100
  97. 5ac3cc9 TSP: Let the platform decide which secure memory to use by Sandrine Bailleux · Tue May 20 17:22:24 2014 +0100
  98. 7055ca4 Reserve some DDR DRAM for secure use on FVP platforms by Juan Castillo · Fri May 16 15:33:15 2014 +0100
  99. 9637745 Add support for BL3-1 as a reset vector by Vikram Kanigiri · Thu Apr 24 11:02:16 2014 +0100
  100. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · Fri May 16 18:48:12 2014 +0100