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git01.mediatek.com / filogic / atf / aa4e3f22bed672f7fd1901a8e413b94940c9067e / plat / intel / soc / agilex
  1. 7dd4add Merge "intel: Enable EMAC PHY in Intel FPGA platform" into integration by Sandrine Bailleux · Fri Feb 28 10:51:49 2020 +0000
  2. 98b5a11 16550: Use generic console_t data structure by Andre Przywara · Sat Jan 25 00:58:35 2020 +0000
  3. 8d9e891 intel: Enable EMAC PHY in Intel FPGA platform by Tien Hock, Loh · Wed Oct 02 13:49:25 2019 +0800
  4. 7f95059 Merge "intel: Change boot source selection" into integration by Sandrine Bailleux · Wed Feb 12 15:54:02 2020 +0000
  5. 593c4c5 intel: Extend SiP service to support mailbox's RSU by Hadi Asyrafi · Tue Dec 17 19:22:17 2019 +0800
  6. 786db4d intel: Change boot source selection by Hadi Asyrafi · Mon Dec 30 16:00:30 2019 +0800
  7. 218d8fe intel: agilex: Enable uboot BL31 loading by Hadi Asyrafi · Tue Jan 14 10:51:31 2020 +0800
  8. 6aeb55d intel: Add function to check fpga readiness by Hadi Asyrafi · Tue Dec 24 14:43:22 2019 +0800
  9. 36a9f30 intel: Add bridge control for FPGA reconfig by Hadi Asyrafi · Tue Dec 24 10:42:52 2019 +0800
  10. 8ebd237 intel: System Manager refactoring by Hadi Asyrafi · Mon Dec 23 17:58:04 2019 +0800
  11. 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · Mon Dec 23 13:25:33 2019 +0800
  12. e73c511 intel: Enable bridge access in Intel platform by Hadi Asyrafi · Mon Oct 21 16:35:08 2019 +0800
  13. 3afb87a intel: Modify non secure access function by Hadi Asyrafi · Mon Oct 21 16:27:29 2019 +0800
  14. 99361aa Merge "intel: Fix memory calibration" into integration by Manish Pandey · Tue Jan 14 18:28:43 2020 +0000
  15. 1fab9c3 Remove redundant declarations. by Madhukar Pappireddy · Thu Jan 02 16:32:41 2020 -0600
  16. 966f282 intel: Fix memory calibration by Hadi Asyrafi · Wed Oct 16 13:02:22 2019 +0800
  17. 5ae876f intel: Refactor common platform code [5/5] by Hadi Asyrafi · Wed Oct 23 17:58:06 2019 +0800
  18. 4d9f395 intel: Refactor common platform code [4/5] by Hadi Asyrafi · Wed Oct 23 17:35:32 2019 +0800
  19. 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · Wed Oct 23 18:34:14 2019 +0800
  20. f0fa807 intel: Refactor common platform code [2/5] by Hadi Asyrafi · Wed Oct 23 17:02:55 2019 +0800
  21. 9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · Wed Oct 23 16:26:53 2019 +0800
  22. 461f8f4 Invalidate dcache build option for bl2 entry at EL3 by Hadi Asyrafi · Tue Aug 20 15:33:27 2019 +0800
  23. 91071fc intel: agilex: Fix psci power domain off by Hadi Asyrafi · Thu Sep 12 15:14:01 2019 +0800
  24. cc077d9 Merge "intel: agilex: Clear PLL lostlock bypass mode" into integration by Paul Beesley · Wed Aug 28 13:05:51 2019 +0000
  25. 5d7c656 intel: agilex: HMC driver calculate DDR size by Hadi Asyrafi · Fri Aug 16 17:07:42 2019 +0800
  26. 56c4901 intel: agilex: Clear PLL lostlock bypass mode by Hadi Asyrafi · Fri Aug 16 11:08:14 2019 +0800
  27. ad90712 Merge "intel: agilex: Fix memory controller driver" into integration by Paul Beesley · Thu Aug 15 15:30:51 2019 +0000
  28. 83fe38e intel: agilex: Fix memory controller driver by Hadi Asyrafi · Thu Aug 08 18:52:31 2019 +0800
  29. a813fed intel: agilex: Fix reliance on hard coded clock information by Hadi Asyrafi · Wed Aug 14 13:49:00 2019 +0800
  30. 462c6c4 Merge changes from topic "intel-plat-refactor" into integration by Sandrine Bailleux · Wed Aug 07 14:20:01 2019 +0000
  31. 309ac01 intel: Platform common code refactor by Hadi Asyrafi · Thu Aug 01 14:48:39 2019 +0800
  32. 6a240c7 intel: Platform common code refactor by Hadi Asyrafi · Thu Aug 01 15:21:20 2019 +0800
  33. e944d22 intel: agilex: Fix BL31 memory mapping by Hadi Asyrafi · Tue Jul 30 10:56:38 2019 +0800
  34. a724e43 intel: agilex: Fix build error by Ambroise Vincent · Tue Jul 23 11:10:27 2019 +0100
  35. 616da77 intel: Adds support for Agilex platform by Hadi Asyrafi · Thu Jun 27 11:34:03 2019 +0800