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git01.mediatek.com / filogic / atf / a9057a096049196da90ec5e768ea27eb41112687 / plat / xilinx / zynqmp / pm_service / pm_api_clock.c
  1. a9057a0 zynqmp: pm: Reimplement clock disable EEMI API by Jolly Shah · 6 years ago
  2. a520980 zynqmp: pm: Reimplement clock enable EEMI API by Jolly Shah · 6 years ago
  3. 77eb52f zynqmp: pm: Return the buffered PLL mode through IOCTL PLL get mode API by Jolly Shah · 6 years ago
  4. cb5bc75 zynqmp: pm: Buffer the PLL mode that is set using IOCTL API by Jolly Shah · 6 years ago
  5. 68116ef zynqmp: pm: Set PLL fractional data using PLL set parameter EEMI API by Jolly Shah · 6 years ago
  6. b4c9946 zynqmp: pm: Get PLL fractional data using PLL get parameter EEMI API by Jolly Shah · 6 years ago
  7. 914f1cd zynqmp: pm: Correct function header of clock APIs by Rajan Vaja · 6 years ago
  8. afaeb0d zynqmp: pm_service: Ignore enable/disable of PLL type clocks by Siva Durga Prasad Paladugu · 6 years ago
  9. e2aa827 zynqmp: pm: Use critical flag instead of initenable by Siva Durga Prasad Paladugu · 6 years ago
  10. 90539cd zynqmp: pm: Correct WDT clock database by Siva Durga Prasad Paladugu · 6 years ago
  11. da95940 zynqmp: pm: Add API to get number of clocks by Rajan Vaja · 6 years ago
  12. 69fb5bf zynqmp: pm: Minor corrections for MISRA compliance by Jolly Shah · 6 years ago
  13. d98455b zynqmp: pm: Implement clock APIs by Rajan Vaja · 6 years ago
  14. 3511613 zynqmp: pm: Add clock control EEMI API and ioctl functions by Rajan Vaja · 6 years ago