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filogic
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atf
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a903e6c7e2bb102f56ddd2de87b9684cf08ee284
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bl31
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aarch64
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bl31_entrypoint.S
449dbd5
Introduce PROGRAMMABLE_RESET_ADDRESS build option
by Sandrine Bailleux
· 9 years ago
acde8b0
Rationalize reset handling code
by Sandrine Bailleux
· 9 years ago
a877c25
Add support to indicate size and end of assembly functions
by Kévin Petit
· 10 years ago
9b38fc8
Initialise cpu ops after enabling data cache
by Vikram Kanigiri
· 10 years ago
36433d1
Call reset handlers upon BL3-1 entry.
by Yatharth Kochar
· 10 years ago
2ae2043
Remove coherent memory from the BL memory maps
by Soby Mathew
· 10 years ago
046cd3f
Miscellaneous documentation fixes
by Sandrine Bailleux
· 10 years ago
8e2f287
Add CPU specific power management operations
by Soby Mathew
· 10 years ago
c704cbc
Introduce framework for CPU specific operations
by Soby Mathew
· 10 years ago
ed1744e
Unmask SError interrupt and clear SCR_EL3.EA bit
by Achin Gupta
· 10 years ago
b3dbeb0
Call platform_is_primary_cpu() only from reset handler
by Juan Castillo
· 10 years ago
45c31c4
Merge pull request #172 from soby-mathew/sm/asm_assert
by danh-arm
· 10 years ago
c1adbbc
Rework the crash reporting in BL3-1 to use less stack
by Soby Mathew
· 10 years ago
9f09835
Simplify management of SCTLR_EL3 and SCTLR_EL1
by Achin Gupta
· 10 years ago
f4a9709
Remove coherent stack usage from the cold boot path
by Achin Gupta
· 10 years ago
f268c72
Merge pull request #151 from vikramkanigiri/vk/t133-code-readability
by Andrew Thoelke
· 10 years ago
cf79bf5
Simplify entry point information generation code on FVP
by Vikram Kanigiri
· 10 years ago
4d2d553
Remove early_exceptions from BL3-1
by Andrew Thoelke
· 10 years ago
8c28fe0
Per-cpu data cache restructuring
by Andrew Thoelke
· 10 years ago
9cf2bb7
Introduce interrupt handling framework in BL3-1
by Achin Gupta
· 11 years ago
9637745
Add support for BL3-1 as a reset vector
by Vikram Kanigiri
· 11 years ago
da56743
Populate BL31 input parameters as per new spec
by Vikram Kanigiri
· 11 years ago
a3a5e4a
Rework handover interface between BL stages
by Vikram Kanigiri
· 10 years ago
9ceff0f
Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1
by danh-arm
· 11 years ago
6c5192a
Preserve x19-x29 across world switch for exception handling
by Soby Mathew
· 11 years ago
f977ed8
Access system registers directly in assembler
by Andrew Thoelke
· 11 years ago
42e75a7
Correct usage of data and instruction barriers
by Andrew Thoelke
· 11 years ago
2bd4ef2
Reduce deep nesting of header files
by Dan Handley
· 11 years ago
714a0d2
Make use of user/system includes more consistent
by Dan Handley
· 11 years ago
38bde41
Place assembler functions in separate sections
by Andrew Thoelke
· 11 years ago
35ca351
Add support for BL3-2 in BL3-1
by Achin Gupta
· 11 years ago
e4d084e
Rework BL2 to BL3-1 hand over interface
by Achin Gupta
· 11 years ago
caa8493
Add support for handling runtime service requests
by Jeenu Viswambharan
· 11 years ago
b739f22
Setup VBAR_EL3 incrementally
by Achin Gupta
· 11 years ago
3a4cae0
Change comments in assembler files to help ctags
by Jeenu Viswambharan
· 11 years ago
4f60368
Do not trap access to floating point registers
by Harry Liebel
· 11 years ago
e83b0ca
Update year in copyright text to 2014
by Dan Handley
· 11 years ago
93ca221
Make BL31's ns_entry_info a single-cpu area
by Sandrine Bailleux
· 11 years ago
ba6980a
Move RUN_IMAGE constant from bl1.h to bl_common.h
by Sandrine Bailleux
· 11 years ago
ab2d31e
Enable third party contributions
by Dan Handley
· 11 years ago
65f546a
Properly initialise the C runtime environment
by Sandrine Bailleux
· 11 years ago
8d69a03
Various improvements/cleanups on the linker scripts
by Sandrine Bailleux
· 11 years ago
c10bd2c
Move generic architectural setup out of blx_plat_arch_setup().
by Sandrine Bailleux
· 11 years ago
4f6ad66
ARMv8 Trusted Firmware release v0.2
by Achin Gupta
· 11 years ago