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git01.mediatek.com / filogic / atf / a5db1846ffbd84974b1f51d989f8423ac0f32028
  1. df87323 Merge pull request #111 'soby-mathew-sm:fix_cookie_to_int_handler' by Dan Handley · 10 years ago
  2. b86acb0 Merge pull request #115 'athoelke-at:fix-bl31-X1-parameter' by Dan Handley · 10 years ago
  3. b8b9002 Merge pull request #114 from 'vikramkanigiri:vk/pass_bl33_args' by Dan Handley · 10 years ago
  4. 93c89ec Fix compilation issue for IMF_READ_INTERRUPT_ID build flag by Soby Mathew · 10 years ago
  5. 799f0ab Pass 'cookie' parameter to interrupt handler in BL3-1 by Soby Mathew · 10 years ago
  6. a55566d Allow platform parameter X1 to be passed to BL3-1 by Andrew Thoelke · 10 years ago
  7. 614f395 Pass the args to the BL3-3 entrypoint by Vikram Kanigiri · 10 years ago
  8. 459df4c Merge pull request #110 from soby-mathew:sm/support_normal_irq_in_tsp-v4 into for-v0.4 by Dan Handley · 10 years ago
  9. 10e2df2 Merge pull request #112 from danh-arm:dh/refactor-plat-header-v4 into for-v0.4 by Dan Handley · 10 years ago
  10. 701fea7 Further renames of platform porting functions by Dan Handley · 10 years ago
  11. 2159ef4 Remove FVP specific comments in platform.h by Dan Handley · 10 years ago
  12. 3d57851 Fixup Standard SMC Resume Handling by Soby Mathew · 10 years ago
  13. b226a4d Add enable mmu platform porting interfaces by Dan Handley · 11 years ago
  14. ea45157 Rename FVP specific files and functions by Dan Handley · 11 years ago
  15. 7ce42df Move BL porting functions into platform.h by Dan Handley · 11 years ago
  16. ed6ff95 Split platform.h into separate headers by Dan Handley · 11 years ago
  17. 60b13e3 Remove unused data declarations by Dan Handley · 11 years ago
  18. a17fefa Remove extern keyword from function declarations by Dan Handley · 11 years ago
  19. 335bf58 Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · 10 years ago
  20. 5e9b3ab doc: Update information about the memory layout by Sandrine Bailleux · 10 years ago
  21. 6c8b359 Make the memory layout more flexible by Sandrine Bailleux · 10 years ago
  22. f748806 Make BL1 RO and RW base addresses configurable by Sandrine Bailleux · 10 years ago
  23. 332ff85 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · 10 years ago
  24. 077193f Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · 10 years ago
  25. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · 10 years ago
  26. 31f0f8f Merge pull request #100 from jcastillo-arm:jc/tf-issues/149-v4 by Andrew Thoelke · 10 years ago
  27. 44a07af Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · 10 years ago
  28. a83a38c Merge pull request #103 from athoelke:dh/tf-issues#68-v3 by Andrew Thoelke · 10 years ago
  29. 29c7ae1 Merge pull request #99 from vikramkanigiri:vk/tf-issues-133_V3 by Andrew Thoelke · 10 years ago
  30. 1c5630d Merge pull request #67 from achingupta:ag/psci_standby_bug_fix by Andrew Thoelke · 10 years ago
  31. aaa6ff8 Limit BL3-1 read/write access to SRAM by Andrew Thoelke · 10 years ago
  32. 891c4ca Use a vector table for TSP entrypoints by Andrew Thoelke · 10 years ago
  33. 9f71f70 Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · 11 years ago
  34. 21a30ab Allow BL3-2 platform definitions to be optional by Dan Handley · 11 years ago
  35. bbc33f2 Enable secure timer to generate S-EL1 interrupts by Achin Gupta · 11 years ago
  36. aeaab68 Add S-EL1 interrupt handling support in the TSPD by Achin Gupta · 11 years ago
  37. a4f50c2 Add support for asynchronous FIQ handling in TSP by Achin Gupta · 11 years ago
  38. 7671789 Add support for synchronous FIQ handling in TSP by Achin Gupta · 11 years ago
  39. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · 11 years ago
  40. 9cf2bb7 Introduce interrupt handling framework in BL3-1 by Achin Gupta · 11 years ago
  41. 02d3628 Introduce platform api to access an ARM GIC by Achin Gupta · 11 years ago
  42. 191e86e Introduce interrupt registration framework in BL3-1 by Achin Gupta · 11 years ago
  43. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · 11 years ago
  44. 18d6eaf Rework 'state' field usage in per-cpu TSP context by Achin Gupta · 11 years ago
  45. fcf9765 Doc: Add the "Building the Test Secure Payload" section by Sandrine Bailleux · 11 years ago
  46. e701e30 fvp: Move TSP from Secure DRAM to Secure SRAM by Sandrine Bailleux · 10 years ago
  47. 5ac3cc9 TSP: Let the platform decide which secure memory to use by Sandrine Bailleux · 10 years ago
  48. 7055ca4 Reserve some DDR DRAM for secure use on FVP platforms by Juan Castillo · 11 years ago
  49. 9637745 Add support for BL3-1 as a reset vector by Vikram Kanigiri · 11 years ago
  50. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · 11 years ago
  51. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · 11 years ago
  52. a3a5e4a Rework handover interface between BL stages by Vikram Kanigiri · 11 years ago
  53. 9851e42 Introduce macros to manipulate the SPSR by Vikram Kanigiri · 11 years ago
  54. 8782852 Merge pull request #91 from linmaonly/lin_dev by Andrew Thoelke · 10 years ago
  55. e2e9fb8 Merge pull request #83 from athoelke/at/tf-issues-126 by Andrew Thoelke · 10 years ago
  56. ab3d352 Merge pull request #85 from hliebel/hl/bl30-doc by Andrew Thoelke · 10 years ago
  57. 0b9d59f Address issue 156: 64-bit addresses get truncated by Lin Ma · 10 years ago
  58. eed7a5b Improve BL3-0 documentation by Harry Liebel · 11 years ago
  59. b058556 Merge pull request #78 from jeenuv:tf-issues-148 by Andrew Thoelke · 10 years ago
  60. d1b6015 Add build configuration for timer save/restore by Jeenu Viswambharan · 11 years ago
  61. 4b9608b Document summary of build options in user guide by Jeenu Viswambharan · 11 years ago
  62. 19a0ace Reorganize build options by Jeenu Viswambharan · 11 years ago
  63. e5c39fd Introduce convenience functions to build by Jeenu Viswambharan · 11 years ago
  64. 2ecdd8f Set SCR_EL3.RW correctly before exiting bl31_main by Andrew Thoelke · 11 years ago
  65. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 11 years ago
  66. 96c207a Merge pull request #71 from sandrine-bailleux:sb/fix-tsp-fvp-makefile by Andrew Thoelke · 11 years ago
  67. 6bee0fc Merge pull request #69 from sandrine-bailleux:sb/split-mmu-fcts-per-el by Andrew Thoelke · 11 years ago
  68. a3bd38c Merge pull request #68 from jcastillo-arm/jc/tf-issues/137 by Andrew Thoelke · 11 years ago
  69. 55452f1 Merge pull request #66 from athoelke/tzc-config-fix by danh-arm · 11 years ago
  70. 3086cc9 fvp: Use the right implem. of plat_report_exception() in BL3-2 by Sandrine Bailleux · 11 years ago
  71. 969bdb2 Fix C accessors to GIC distributor registers with set/clear semantics by Juan Castillo · 11 years ago
  72. 42c5280 Fix broken standby state implementation in PSCI by Achin Gupta · 11 years ago
  73. fe3374b Fixes for TZC configuration on FVP by Andrew Thoelke · 11 years ago
  74. 74a62b3 fvp: Provide per-EL MMU setup functions by Sandrine Bailleux · 11 years ago
  75. 25232af Introduce IS_IN_ELX() macros by Sandrine Bailleux · 11 years ago
  76. df89f9f Merge pull request #65 from vikramkanigiri/vk/console_init by danh-arm · 11 years ago
  77. 9ceff0f Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1 by danh-arm · 11 years ago
  78. 3684abf Ensure a console is initialized before it is used by Vikram Kanigiri · 11 years ago
  79. 1644425 Merge pull request #62 from athoelke/set-little-endian-v2 by danh-arm · 11 years ago
  80. 6c5192a Preserve x19-x29 across world switch for exception handling by Soby Mathew · 11 years ago
  81. 6bdfa91 Merge pull request #58 from athoelke/optimise-cache-flush-v2 by danh-arm · 11 years ago
  82. 86f0665 Merge pull request #61 from athoelke/use-mrs-msr-from-assembler-v2 by danh-arm · 11 years ago
  83. 99cb464 Merge pull request #60 from athoelke/disable-mmu-v2 by danh-arm · 11 years ago
  84. 719e870 Merge pull request #59 from athoelke/review-barriers-v2 by danh-arm · 11 years ago
  85. faed43f Merge pull request #57 from sandrine-bailleux/sb/remove-pl011-base by danh-arm · 11 years ago
  86. aa3266a Remove unused 'PL011_BASE' macro by Sandrine Bailleux · 11 years ago
  87. 6a5b3a4 Optimise data cache clean/invalidate operation by Andrew Thoelke · 11 years ago
  88. 5879ffd Remove unused or invalid asm helper functions by Andrew Thoelke · 11 years ago
  89. f977ed8 Access system registers directly in assembler by Andrew Thoelke · 11 years ago
  90. 438c63a Replace disable_mmu with assembler version by Andrew Thoelke · 11 years ago
  91. 42e75a7 Correct usage of data and instruction barriers by Andrew Thoelke · 11 years ago
  92. f994ffb Set processor endianness immediately after RESET by Andrew Thoelke · 11 years ago
  93. 806af56 Merge pull request #49 from danh-arm/dh/remove-non-const-data by danh-arm · 11 years ago
  94. a4cb68e Remove variables from .data section by Dan Handley · 11 years ago
  95. 378e082 Merge pull request #48 from danh-arm/dh/major-refactoring by danh-arm · 11 years ago
  96. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · 11 years ago
  97. e2712bc Always use named structs in header files by Dan Handley · 11 years ago
  98. 27f6e7d Move PSCI global functions out of private header by Dan Handley · 11 years ago
  99. bcd60ba Separate BL functions out of arch.h by Dan Handley · 11 years ago
  100. 930ee2e Refactor GIC header files by Dan Handley · 11 years ago