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git01.mediatek.com / filogic / atf / 9f5dfc9b48a370f846e86078f971219c2502364a / plat / intel / soc / stratix10 / bl2_plat_setup.c
  1. 9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · 4 years, 9 months ago
  2. 78fee35 intel: stratix10: Fix reliance on hard coded clock information by Hadi Asyrafi · 5 years ago
  3. 309ac01 intel: Platform common code refactor by Hadi Asyrafi · 5 years ago
  4. c461add intel: Pull out common drivers into platform common by Hadi Asyrafi · 5 years ago
  5. c0d4d93 intel: Enable watchdog timer on Intel S10 platform by Muhammad Hadi Asyrafi Abdul Halim · 5 years ago
  6. 2444bfa intel: QSPI boot enablement by Muhammad Hadi Asyrafi Abdul Halim · 5 years ago
  7. e408aa2 Merge pull request #1863 from thloh85-intel/mmc_fixes by Dimitris Papastamos · 5 years ago
  8. b978c08 plat: intel: Add MMC OCR voltage information for initialization by Tien Hock, Loh · 5 years ago
  9. b5ed794 intel: Mailbox service un-accessible by Muhammad Hadi Asyrafi Abdul Halim · 5 years ago
  10. 3d1063e plat: intel: Fix faulty DDR calibration value by Loh Tien Hock · 5 years ago
  11. 59400a4 plat: intel: Add BL2 support for Stratix 10 SoC by Loh Tien Hock · 5 years ago