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git01.mediatek.com / filogic / atf / 9e60563dae5ca02d2cede3bab800f9619b2e43e5 / bl31
  1. d90f43e rockchip: optimize the link mechanism for SRAM code by Caesar Wang · 8 years ago
  2. 3cac786 Add PMF instrumentation points in TF by dp-arm · 8 years ago
  3. 8da8966 PSCI: Do psci_setup() as part of std_svc_setup() by Soby Mathew · 8 years ago
  4. 89256b8 PSCI: Introduce PSCI Library argument structure by Soby Mathew · 8 years ago
  5. d019487 Introduce PSCI Library Interface by Soby Mathew · 9 years ago
  6. 0d78607 Introduce `el3_runtime` and `PSCI` libraries by Soby Mathew · 9 years ago
  7. a0fedc4 Rework type usage in Trusted Firmware by Soby Mathew · 8 years ago
  8. f91f144 Introduce SEPARATE_CODE_AND_RODATA build flag by Sandrine Bailleux · 8 years ago
  9. 241ec6c Add optional PSCI STAT residency & count functions by Yatharth Kochar · 8 years ago
  10. 9518d02 Add Performance Measurement Framework(PMF) by Yatharth Kochar · 9 years ago
  11. a913dee Merge pull request #636 from soby-mathew/sm/cpu_ctx_rem_aarch32_regs by danh-arm · 8 years ago
  12. d75d2ba Build option to include AArch32 registers in cpu context by Soby Mathew · 8 years ago
  13. 9e6ad6c Introduce some helper macros for exception vectors by Sandrine Bailleux · 8 years ago
  14. 391a76e Add 32 bit version of plat_get_syscnt_freq by Antonio Nino Diaz · 8 years ago
  15. 2c7ed5b Dump platform-defined regs in crash reporting by Gerald Lejeune · 9 years ago
  16. 851dc7e Add ISR_EL1 to crash report by Gerald Lejeune · 9 years ago
  17. 632d6df Enable asynchronous abort exceptions during boot by Gerald Lejeune · 9 years ago
  18. 1f21bcf Remove all non-configurable dead loops by Antonio Nino Diaz · 9 years ago
  19. b3a0a7b Add support for %p in tf_printf() by Antonio Nino Diaz · 9 years ago
  20. f4119ec Miscellaneous doc fixes for v1.2 by Sandrine Bailleux · 9 years ago
  21. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 9 years ago
  22. 6e8f0b1 Merge pull request #462 from soby-mathew/sm/runtime_console by danh-arm · 9 years ago
  23. 6c0566c Move context management code to common location by Yatharth Kochar · 9 years ago
  24. 1ff495b Ensure BL31 does not print to boot console by default by Soby Mathew · 9 years ago
  25. e6c3240 Merge pull request #460 from sandrine-bailleux/sb/init-vttbrel2-vmid by danh-arm · 9 years ago
  26. 8b0eafe Initialize VTTBR_EL2 when bypassing EL2 by Sandrine Bailleux · 9 years ago
  27. 1301122 Merge pull request #457 from soby-mathew/sm/fix_fpregs_restore by danh-arm · 9 years ago
  28. e77e116 Fix issue in Floating point register restore by Soby Mathew · 9 years ago
  29. 58e32d1 Enable support for EL3 interrupt in IMF by Soby Mathew · 9 years ago
  30. 8f67649 Merge pull request #443 from achingupta/sb/el3_payloads-cb_single_cpu by danh-arm · 9 years ago
  31. b21b02f Introduce COLD_BOOT_SINGLE_CPU build option by Sandrine Bailleux · 9 years ago
  32. c5204fa Remove the IMF_READ_INTERRUPT_ID build option by Soby Mathew · 9 years ago
  33. 18a6204 Replace build macro WARN_DEPRECATED with ERROR_DEPRECATED by Soby Mathew · 9 years ago
  34. 489c939 Merge pull request #424 from jcastillo-arm/jc/tf-issues/327 by Achin Gupta · 9 years ago
  35. 53c5184 IMF: postpone SCR_EL3 update if context is not initialized by Juan Castillo · 9 years ago
  36. b2e224c Introduce print_entry_point_info() function by Sandrine Bailleux · 9 years ago
  37. 405fafe Fix relocation of __PERCPU_BAKERY_LOCK_SIZE__ by Vikram Kanigiri · 9 years ago
  38. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · 9 years ago
  39. e466c9f Re-design bakery lock memory allocation and algorithm by Andrew Thoelke · 9 years ago
  40. 3700a92 PSCI: Migrate TF to the new platform API and CM helpers by Soby Mathew · 9 years ago
  41. 981487a PSCI: Switch to the new PSCI frameworks by Soby Mathew · 9 years ago
  42. b0082d2 PSCI: Introduce new platform and CM helper APIs by Soby Mathew · 10 years ago
  43. 9ccbc03 Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1 by danh-arm · 9 years ago
  44. 449dbd5 Introduce PROGRAMMABLE_RESET_ADDRESS build option by Sandrine Bailleux · 9 years ago
  45. acde8b0 Rationalize reset handling code by Sandrine Bailleux · 9 years ago
  46. 979992e Fix handling of spurious interrupts in BL3_1 by Achin Gupta · 9 years ago
  47. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · 10 years ago
  48. 00f58f0 Merge pull request #268 from vikramkanigiri/vk/move_init_cpu_ops by danh-arm · 10 years ago
  49. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · 10 years ago
  50. 8723adf Enable type-checking of arguments passed to printf() et al. by Sandrine Bailleux · 10 years ago
  51. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  52. 47903c0 Demonstrate model for routing IRQs to EL3 by Soby Mathew · 10 years ago
  53. 2ae2043 Remove coherent memory from the BL memory maps by Soby Mathew · 10 years ago
  54. 523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · 10 years ago
  55. 070a3e0 Merge pull request #206 from soby-mathew/sm/reset_cntvoff by Andrew Thoelke · 10 years ago
  56. fd8c077 Fix LENGTH attribute value in linker scripts by Juan Castillo · 10 years ago
  57. c93c9df Initialize SCTLR_EL1 based on MODE_RW bit by Jens Wiklander · 10 years ago
  58. feddfcf Reset CNTVOFF_EL2 register before exit into EL1 on warm boot by Soby Mathew · 10 years ago
  59. 046cd3f Miscellaneous documentation fixes by Sandrine Bailleux · 10 years ago
  60. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  61. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  62. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago
  63. 4dc4a47 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · 10 years ago
  64. 9e46188 Merge pull request #189 from achingupta/ag/tf-issues#153 by Dan Handley · 10 years ago
  65. ed1744e Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · 10 years ago
  66. 71ac11f Merge pull request #184 from jcastillo-arm/jc/tf-issues/100 by danh-arm · 10 years ago
  67. 91b624e Rationalize console log output by Dan Handley · 10 years ago
  68. 0c70c57 FVP: apply new naming conventions to memory regions by Juan Castillo · 10 years ago
  69. 534ae7f Merge pull request #179 from jcastillo-arm/jc/tf-issues/219 by danh-arm · 10 years ago
  70. 6dc22e3 Merge pull request #178 from soby-mathew/sm/optmize_el3_context by danh-arm · 10 years ago
  71. 4e81341 Support asynchronous method for BL3-2 initialization by Vikram Kanigiri · 10 years ago
  72. b3dbeb0 Call platform_is_primary_cpu() only from reset handler by Juan Castillo · 10 years ago
  73. 2ed46e9 Optimize EL3 register state stored in cpu_context structure by Soby Mathew · 10 years ago
  74. 5cd545d Merge pull request #177 from jcastillo-arm/jc/tf-issues/096 by danh-arm · 10 years ago
  75. 45c31c4 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 10 years ago
  76. 3299181 Merge pull request #170 from achingupta/ag/tf-issues#226 by danh-arm · 10 years ago
  77. 289162c Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · 10 years ago
  78. f558cac Rework incorrect use of assert() and panic() in codebase by Juan Castillo · 10 years ago
  79. 0da9593 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · 10 years ago
  80. c1adbbc Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  81. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · 10 years ago
  82. 04be3a5 Add support for printing version at runtime by Juan Castillo · 10 years ago
  83. afe7e2f Implement a leaner printf for Trusted Firmware by Soby Mathew · 10 years ago
  84. e1aa516 Remove coherent stack usage from the warm boot path by Achin Gupta · 10 years ago
  85. f4a9709 Remove coherent stack usage from the cold boot path by Achin Gupta · 10 years ago
  86. 47a6483 Merge pull request #162 from jcastillo-arm/jc/tf-issues/194 by danh-arm · 10 years ago
  87. 3c449d7 Merge pull request #163 from sandrine-bailleux/sb/tf-issue-117-v2 by danh-arm · 10 years ago
  88. e2e0c65 fvp: Reuse BL1 and BL2 memory through image overlaying by Sandrine Bailleux · 10 years ago
  89. 258e94f Allow FP register context to be optional at build time by Juan Castillo · 10 years ago
  90. f268c72 Merge pull request #151 from vikramkanigiri/vk/t133-code-readability by Andrew Thoelke · 10 years ago
  91. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · 10 years ago
  92. cf79bf5 Simplify entry point information generation code on FVP by Vikram Kanigiri · 10 years ago
  93. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · 10 years ago
  94. 40110f7 Merge pull request #138 from athoelke/at/cpu-context by danh-arm · 10 years ago
  95. 4d2d553 Remove early_exceptions from BL3-1 by Andrew Thoelke · 10 years ago
  96. c02dbd6 Move CPU context pointers into cpu_data by Andrew Thoelke · 10 years ago
  97. 8c28fe0 Per-cpu data cache restructuring by Andrew Thoelke · 10 years ago
  98. e385767 Merge pull request #133 from athoelke/at/crash-reporting-opt by danh-arm · 10 years ago
  99. d25686a Merge pull request #131 from athoelke/at/cm_get_context by danh-arm · 10 years ago
  100. 385f4d4 Make the BL3-1 crash reporting optional by Andrew Thoelke · 10 years ago