1. a7c4687 Add initial CPU support for Cortex-Helios by Joel Hutton · 7 years ago
  2. 9463cae Add initial CPU support for Cortex-Deimos by Joel Hutton · 7 years ago
  3. 95f30ab Add end_vector_entry assembler macro by Roberto Vargas · 7 years ago
  4. bb0aa39 cpulib: Add ISBs or comment why they are unneeded by Dimitris Papastamos · 6 years ago
  5. 14f7005 Fix MISRA Rule 5.7 Part 1 by Daniel Boulby · 7 years ago
  6. 8c18f6a Merge pull request #1397 from dp-arm/dp/cortex-a76 by Dimitris Papastamos · 6 years ago
  7. 312e17e Implement dynamic mitigation for CVE-2018-3639 on Cortex-A76 by Dimitris Papastamos · 7 years ago
  8. 7ca21db Implement Cortex-Ares 1043202 erratum workaround by Dimitris Papastamos · 7 years ago
  9. 89736dd Add AMU support for Cortex-Ares by Dimitris Papastamos · 7 years ago
  10. ea84d6b Add support for Cortex-Ares and Cortex-A76 CPUs by Isla Mitchell · 7 years ago
  11. 6694633 Fast path SMCCC_ARCH_WORKAROUND_1 calls from AArch32 by Dimitris Papastamos · 6 years ago
  12. ba51d9e Add support for dynamic mitigation for CVE-2018-3639 by Dimitris Papastamos · 7 years ago
  13. 4a284a4 aarch32: Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 7 years ago
  14. e6625ec Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 7 years ago
  15. 570c06a Rename symbols and files relating to CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  16. e34bd09 Workaround for CVE-2017-5715 on NVIDIA Denver CPUs by Varun Wadekar · 7 years ago
  17. 6e1796e Check presence of fix for errata 835769 in Cortex-A53 by Jonathan Wright · 7 years ago
  18. efb1f33 Check presence of fix for errata 843419 in Cortex-A53 by Jonathan Wright · 7 years ago
  19. 914757c Fixup `SMCCC_ARCH_FEATURES` semantics by Dimitris Papastamos · 7 years ago
  20. 780cc95 Use PFR0 to identify need for mitigation of CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  21. 864364a MISRA fixes for Cortex A75 AMU implementation by Dimitris Papastamos · 7 years ago
  22. 1be747f Refactor AMU support for Cortex A75 by Dimitris Papastamos · 7 years ago
  23. 0b00f8a Factor out CPU AMU helpers by Dimitris Papastamos · 7 years ago
  24. d1e1930 Fixup AArch32 errata printing framework by Soby Mathew · 7 years ago
  25. 8ca3144 Merge pull request #1253 from dp-arm/dp/amu32 by davidcunado-arm · 7 years ago
  26. 0dcdd8d AMU: Implement context save/restore for aarch32 by Joel Hutton · 7 years ago
  27. 2880363 Optimize SMCCC_ARCH_WORKAROUND_1 on Cortex A57/A72/A73 and A75 by Dimitris Papastamos · 7 years ago
  28. b63c6f1 Optimize/cleanup BPIALL workaround by Dimitris Papastamos · 7 years ago
  29. 04285cf Merge pull request #1228 from dp-arm/dp/cve_2017_5715 by davidcunado-arm · 7 years ago
  30. 471fb9b Merge pull request #1229 from manojkumar-arm/manojkumar-arm/ca72-aarch32-reset-fix by davidcunado-arm · 7 years ago
  31. b5d1f8e Merge pull request #1200 from robertovargas-arm/bl2-el3 by davidcunado-arm · 7 years ago
  32. e37c029 lib/cpus: fix branching in reset function for cortex-a72 AARCH32 mode by Manoj Kumar · 7 years ago
  33. 8ca0af2 Workaround for CVE-2017-5715 for Cortex A9, A15 and A17 by Dimitris Papastamos · 7 years ago
  34. 858bd61 Print erratum application report for CVE-2017-5715 by Dimitris Papastamos · 7 years ago
  35. 84e02dc Change the default errata format string by Dimitris Papastamos · 7 years ago
  36. e0e9946 bl2-el3: Add BL2_EL3 image by Roberto Vargas · 7 years ago
  37. fa2b736 Merge pull request #1197 from dp-arm/dp/amu by davidcunado-arm · 7 years ago
  38. d7e2e9e Add hooks to save/restore AMU context for Cortex A75 by Dimitris Papastamos · 7 years ago
  39. 43e05ec Use PFR0 to identify need for mitigation of CVE-2017-5915 by Dimitris Papastamos · 7 years ago
  40. c52ebdc Workaround for CVE-2017-5715 on Cortex A73 and A75 by Dimitris Papastamos · 7 years ago
  41. 446f7f1 Workaround for CVE-2017-5715 on Cortex A57 and A72 by Dimitris Papastamos · 7 years ago
  42. 4c24bb7 Merge pull request #1168 from matt2048/master by davidcunado-arm · 7 years ago
  43. fcedb69 Implement support for the Activity Monitor Unit on Cortex A75 by Dimitris Papastamos · 7 years ago
  44. 41b0094 Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS by Matt Ma · 7 years ago
  45. 09d26a6 ARMv7: introduce Cortex-A12 by Etienne Carriere · 7 years ago
  46. 010dd1f ARMv7: introduce Cortex-A17 by Etienne Carriere · 7 years ago
  47. f2f7b91 ARMv7: introduce Cortex-A7 by Etienne Carriere · 7 years ago
  48. 37f8cdc ARMv7: introduce Cortex-A5 by Etienne Carriere · 7 years ago
  49. a1249e0 ARMv7: introduce Cortex-A9 by Etienne Carriere · 7 years ago
  50. 4ece755 ARMv7: introduce Cortex-A15 by Etienne Carriere · 7 years ago
  51. c3b4ca1 Cortex-A72: Implement workaround for erratum 859971 by Eleanor Bonnici · 7 years ago
  52. 0c9bd27 Cortex-A57: Implement workaround for erratum 859972 by Eleanor Bonnici · 7 years ago
  53. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  54. 9930501 Fix order of #includes by Isla Mitchell · 7 years ago
  55. d0c8273 Introduce TF_LDFLAGS by Douglas Raillard · 7 years ago
  56. 505f467 Merge pull request #1002 from douglas-raillard-arm/dr/fix_errata_a53 by danh-arm · 7 years ago
  57. 8a354f1 Resolve signed-unsigned comparison issues by David Cunado · 7 years ago
  58. d56fb04 Apply workarounds for A53 Cat A Errata 835769 and 843419 by Douglas Raillard · 7 years ago
  59. 2b40ca6 aarch32: Implement errata workarounds for Cortex A57 by Dimitris Papastamos · 7 years ago
  60. 9c47a5a aarch32: Implement errata workarounds for Cortex A53 by Dimitris Papastamos · 7 years ago
  61. 370542e aarch32: Implement cpu_rev_var_hs() by Dimitris Papastamos · 7 years ago
  62. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  63. 66231d1 Tegra: enable 'signed-comparison' compilation warning/errors by Varun Wadekar · 7 years ago
  64. 805c2c7 Add support for Cortex-A75 and Cortex-A55 CPUs by David Wang · 8 years ago
  65. 815faa8 Use a callee-saved register to be AAPCS-compliant by dp-arm · 8 years ago
  66. fa3cf0b Use SPDX license identifiers by dp-arm · 8 years ago
  67. bf360df Merge pull request #910 from dp-arm/dp/AArch32-juno-port by davidcunado-arm · 8 years ago
  68. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · 8 years ago
  69. 7c65c1e Remove build option `ASM_ASSERTION` by Antonio Nino Diaz · 8 years ago
  70. 8cbdab2 Merge pull request #870 from douglas-raillard-arm/dr/remove_asm_signed_test by davidcunado-arm · 8 years ago
  71. 00eefd9 Add workaround for ARM Cortex-A53 erratum 855873 by Andre Przywara · 8 years ago
  72. 9d92e8c Replace ASM signed tests with unsigned by Douglas Raillard · 8 years ago
  73. c4364f6 Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat by davidcunado-arm · 8 years ago
  74. 3f13c35 Apply workaround for errata 813419 of Cortex-A57 by Antonio Nino Diaz · 8 years ago
  75. 0a7e27c Merge pull request #853 from vwadekar/tegra-changes-from-downstream-v3 by davidcunado-arm · 8 years ago
  76. 8f87cc3 cpus: denver: remove barrier from denver_enable_dco() by Varun Wadekar · 9 years ago
  77. 1cc176b Merge pull request #848 from douglas-raillard-arm/dr/improve_errata_doc by danh-arm · 8 years ago
  78. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · 9 years ago
  79. c847f66 Clarify errata ERRATA_A53_836870 documentation by Douglas Raillard · 8 years ago
  80. 3c337a6 cpus: Add support for all Denver variants by Varun Wadekar · 9 years ago
  81. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  82. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  83. 1f5f812 Correct system include order by David Cunado · 8 years ago
  84. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  85. adb7027 AArch32: Fix the stack alignment issue by Soby Mathew · 8 years ago
  86. a4c219a AArch32: Add support for ARM Cortex-A32 MPCore Processor by Yatharth Kochar · 8 years ago
  87. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · 8 years ago
  88. 748be1d AArch32: Add support in TF libraries by Soby Mathew · 9 years ago
  89. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · 8 years ago
  90. 63af687 Add support for ARM Cortex-A73 MPCore Processor by Yatharth Kochar · 9 years ago
  91. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · 9 years ago
  92. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · 9 years ago
  93. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · 9 years ago
  94. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · 9 years ago
  95. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · 9 years ago
  96. afa8a78 Fix wording in cpu-ops.mk comments by Sandrine Bailleux · 9 years ago
  97. 6b28c57 Make cpu operations warning a VERBOSE print by Soby Mathew · 9 years ago
  98. f12a31d Cortex-Axx: Unconditionally apply CPU reset operations by Sandrine Bailleux · 9 years ago
  99. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 9 years ago
  100. 432aa77 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · 9 years ago