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git01.mediatek.com
/
filogic
/
atf
/
98ab24a23ba2d56b0a367b858f536d2c7a34ae16
/
include
/
drivers
/
nxp
/
clk
/
s32cc
/
s32cc-clk-ids.h
0609bcd
feat(nxp-clk): enable UART clock
by Ghennadi Procopciuc
· Tue Aug 06 13:25:51 2024 +0300
22f9474
feat(nxp-clk): add PERIPH PLL enablement
by Ghennadi Procopciuc
· Tue Aug 06 11:48:11 2024 +0300
6494966
feat(nxp-clk): add dependencies for the XBAR clock
by Ghennadi Procopciuc
· Mon Aug 05 16:49:51 2024 +0300
48cb761
feat(nxp-clk): add minimal set of S32CC clock ids
by Ghennadi Procopciuc
· Tue Jun 11 18:52:17 2024 +0300