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git01.mediatek.com / filogic / atf / 9887006a8b2743d1ec118045c30d707775c906a5 / include / arch / aarch64 / el3_common_macros.S
  1. 677ed8a refactor(pmu): convert FEAT_MTPMU to C and move to persistent register init by Boyan Karatotev · 1 year, 9 months ago
  2. 05504ba feat(pmu): introduce pmuv3 lib/extensions folder by Boyan Karatotev · 1 year, 9 months ago
  3. 1f55c41 refactor(cpufeat): enable FEAT_DIT for FEAT_STATE_CHECKED by Andre Przywara · 1 year, 10 months ago
  4. 11b9b49 refactor(build): distinguish BL2 as TF-A entry point and BL2 running at EL3 by Arvind Ram Prakash · 2 years ago
  5. 259b6d0 Merge changes from topic "panic_cleanup" into integration by Bipin Ravi · 1 year, 9 months ago
  6. a796b1b refactor(aarch64): rename do_panic and el3_panic by Govindraj Raja · 1 year, 10 months ago
  7. 66a056e refactor(el3_runtime): introduce save_x30 macro by Manish Pandey · 1 year, 10 months ago
  8. 0824b45 feat(bl2): add support to separate no-loadable sections by Jiafei Pan · 2 years, 9 months ago
  9. 928747f fix(el3-runtime): set unset pstate bits to default by Daniel Boulby · 3 years, 6 months ago
  10. 9baade3 feat(sme): enable SME functionality by johpow01 · 3 years, 4 months ago
  11. b0d69e8 fix(pie): invalidate data cache in the entire image range if PIE is enabled by Zelalem Aweke · 3 years, 1 month ago
  12. 688fbf7 feat(rme): run BL2 in root world when FEAT_RME is enabled by Zelalem Aweke · 3 years, 4 months ago
  13. 8ce3394 feat(trf): initialize trap settings of trace filter control registers access by Manish V Badarkhe · 3 years, 4 months ago
  14. f7ee064 feat(sys_reg_trace): initialize trap settings of trace system registers access by Manish V Badarkhe · 3 years, 4 months ago
  15. e1cccb4 feat(trbe): initialize trap settings of trace buffer control registers access by Manish V Badarkhe · 3 years, 5 months ago
  16. c450277 feat(sve): enable SVE for the secure world by Max Shvetsov · 3 years, 8 months ago
  17. 307f34b fix(security): Set MDCR_EL3.MCCD bit by Alexei Fedorov · 3 years, 6 months ago
  18. f3a4c54 Add support for FEAT_MTPMU for Armv8.6 by Javier Almansa Sobrino · 4 years ago
  19. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · 4 years, 3 months ago
  20. e07e808 runtime_exceptions: Update AT speculative workaround by Manish V Badarkhe · 4 years, 4 months ago
  21. 5dc9e9c Fix compilation error when ENABLE_PIE=1 by Varun Wadekar · 4 years, 6 months ago
  22. 31a14e1 bl31: Split into two separate memory regions by Samuel Holland · 6 years ago
  23. c825768 PIE: make call to GDT relocation fixup generalized by Manish Pandey · 5 years ago
  24. add24a4 Explicitly disable the SPME bit in MDCR_EL3 by Petre-Ionut Tudor · 5 years ago
  25. d2f21b8 Add missing support for BL2_AT_EL3 in XIP memory by Lionel Debieve · 5 years ago
  26. 461f8f4 Invalidate dcache build option for bl2 entry at EL3 by Hadi Asyrafi · 5 years ago
  27. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · 5 years ago
  28. 594811b Add ARMv8.3-PAuth registers to CPU context by Antonio Nino Diaz · 6 years ago
  29. 3fbd3f5 Disable processor Cycle Counting in Secure state by Antonio Nino Diaz · 6 years ago
  30. 8d1ade6 Reorganize architecture-dependent header files by Antonio Nino Diaz · 6 years ago[Renamed from include/common/aarch64/el3_common_macros.S]
  31. 0f3a004 Merge pull request #1731 from miyatsu/doc-fix-20181225 by Antonio Niño Díaz · 6 years ago