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filogic
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atf
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958a371bdb5cc2978a3625bf7666fcaa68094d35
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lib
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cpus
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aarch64
fa2b736
Merge pull request #1197 from dp-arm/dp/amu
by davidcunado-arm
· 7 years ago
d7e2e9e
Add hooks to save/restore AMU context for Cortex A75
by Dimitris Papastamos
· 7 years ago
43e05ec
Use PFR0 to identify need for mitigation of CVE-2017-5915
by Dimitris Papastamos
· 7 years ago
c52ebdc
Workaround for CVE-2017-5715 on Cortex A73 and A75
by Dimitris Papastamos
· 7 years ago
446f7f1
Workaround for CVE-2017-5715 on Cortex A57 and A72
by Dimitris Papastamos
· 7 years ago
fcedb69
Implement support for the Activity Monitor Unit on Cortex A75
by Dimitris Papastamos
· 7 years ago
c3b4ca1
Cortex-A72: Implement workaround for erratum 859971
by Eleanor Bonnici
· 7 years ago
0c9bd27
Cortex-A57: Implement workaround for erratum 859972
by Eleanor Bonnici
· 7 years ago
41b61be
CPU: Correct names of implementation-defined aux regs
by Eleanor Bonnici
· 7 years ago
9930501
Fix order of #includes
by Isla Mitchell
· 7 years ago
d56fb04
Apply workarounds for A53 Cat A Errata 835769 and 843419
by Douglas Raillard
· 7 years ago
1384a16
Unique names for defines in the CPU libraries
by Varun Wadekar
· 7 years ago
805c2c7
Add support for Cortex-A75 and Cortex-A55 CPUs
by David Wang
· 8 years ago
815faa8
Use a callee-saved register to be AAPCS-compliant
by dp-arm
· 8 years ago
fa3cf0b
Use SPDX license identifiers
by dp-arm
· 8 years ago
7c65c1e
Remove build option `ASM_ASSERTION`
by Antonio Nino Diaz
· 8 years ago
00eefd9
Add workaround for ARM Cortex-A53 erratum 855873
by Andre Przywara
· 8 years ago
c4364f6
Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat
by davidcunado-arm
· 8 years ago
3f13c35
Apply workaround for errata 813419 of Cortex-A57
by Antonio Nino Diaz
· 8 years ago
8f87cc3
cpus: denver: remove barrier from denver_enable_dco()
by Varun Wadekar
· 9 years ago
d43583c
cpus: denver: disable DCO operations from platform code
by Varun Wadekar
· 9 years ago
3c337a6
cpus: Add support for all Denver variants
by Varun Wadekar
· 9 years ago
d5ec367
Report errata workaround status to console
by Jeenu Viswambharan
· 8 years ago
441bfdd
Use #ifdef for IMAGE_BL* instead of #if
by Masahiro Yamada
· 8 years ago
1f5f812
Correct system include order
by David Cunado
· 8 years ago
ee5eb80
Add provision to extend CPU operations at more levels
by Jeenu Viswambharan
· 8 years ago
6a72a91
bl31: Add error reporting registers
by Naga Sureshkumar Relli
· 8 years ago
63af687
Add support for ARM Cortex-A73 MPCore Processor
by Yatharth Kochar
· 9 years ago
143ef1a
Add support for Cortex-A57 erratum 833471 workaround
by Sandrine Bailleux
· 9 years ago
adcbd55
Add support for Cortex-A57 erratum 826977 workaround
by Sandrine Bailleux
· 9 years ago
48cbe85
Add support for Cortex-A57 erratum 829520 workaround
by Sandrine Bailleux
· 9 years ago
c11116f
Add support for Cortex-A57 erratum 828024 workaround
by Sandrine Bailleux
· 9 years ago
a7e0c53
Add support for Cortex-A57 erratum 826974 workaround
by Sandrine Bailleux
· 9 years ago
6b28c57
Make cpu operations warning a VERBOSE print
by Soby Mathew
· 9 years ago
f12a31d
Cortex-Axx: Unconditionally apply CPU reset operations
by Sandrine Bailleux
· 9 years ago
d481759
Disable non-temporal hint on Cortex-A53/57
by Sandrine Bailleux
· 9 years ago
432aa77
Add support for ARM Cortex-A35 processor
by Sandrine Bailleux
· 9 years ago
4fceaca
cortex_a53: Add A53 errata #826319, #836870
by developer
· 9 years ago
28463b9
Add "Project Denver" CPU support
by Varun Wadekar
· 9 years ago
e364a8a
Fix recursive crash prints on FVP AEM model
by Soby Mathew
· 10 years ago
a877c25
Add support to indicate size and end of assembly functions
by Kévin Petit
· 10 years ago
632432b
Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support
by danh-arm
· 10 years ago
c47e011
Add support for ARM Cortex-A72 processor
by Vikram Kanigiri
· 10 years ago
9b38fc8
Initialise cpu ops after enabling data cache
by Vikram Kanigiri
· 10 years ago
b5a6304
Fix the Cortex-A57 reset handler register usage
by Soby Mathew
· 10 years ago
36433d1
Call reset handlers upon BL3-1 entry.
by Yatharth Kochar
· 10 years ago
7d861ea
Invalidate the dcache after initializing cpu-ops
by Soby Mathew
· 10 years ago
937488b
Optimize Cortex-A57 cluster power down sequence on Juno
by Soby Mathew
· 10 years ago
1604fa0
Optimize barrier usage during Cortex-A57 power down
by Soby Mathew
· 10 years ago
c088433
Apply errata workarounds only when major/minor revisions match.
by Soby Mathew
· 10 years ago
42aa5eb
Add support for level specific cache maintenance operations
by Soby Mathew
· 10 years ago
802f865
Add support for selected Cortex-A57 errata workarounds
by Soby Mathew
· 10 years ago
38b4bc9
Add CPU specific crash reporting handlers
by Soby Mathew
· 10 years ago
8e2f287
Add CPU specific power management operations
by Soby Mathew
· 10 years ago
f1785fd
Add platform API for reset handling
by Soby Mathew
· 10 years ago
c704cbc
Introduce framework for CPU specific operations
by Soby Mathew
· 10 years ago