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filogic
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atf
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93b02d91d5503973789108c33c5991ec4fd3654f
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bl31
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aarch64
851dc7e
Add ISR_EL1 to crash report
by Gerald Lejeune
· 9 years ago
632d6df
Enable asynchronous abort exceptions during boot
by Gerald Lejeune
· 9 years ago
1f21bcf
Remove all non-configurable dead loops
by Antonio Nino Diaz
· 9 years ago
f4119ec
Miscellaneous doc fixes for v1.2
by Sandrine Bailleux
· 9 years ago
7d19941
Remove dashes from image names: 'BL3-x' --> 'BL3x'
by Juan Castillo
· 9 years ago
6c0566c
Move context management code to common location
by Yatharth Kochar
· 9 years ago
e77e116
Fix issue in Floating point register restore
by Soby Mathew
· 9 years ago
8f67649
Merge pull request #443 from achingupta/sb/el3_payloads-cb_single_cpu
by danh-arm
· 9 years ago
b21b02f
Introduce COLD_BOOT_SINGLE_CPU build option
by Sandrine Bailleux
· 9 years ago
c5204fa
Remove the IMF_READ_INTERRUPT_ID build option
by Soby Mathew
· 9 years ago
e9c4a64
Make generic code work in presence of system caches
by Achin Gupta
· 9 years ago
3700a92
PSCI: Migrate TF to the new platform API and CM helpers
by Soby Mathew
· 9 years ago
9ccbc03
Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1
by danh-arm
· 9 years ago
449dbd5
Introduce PROGRAMMABLE_RESET_ADDRESS build option
by Sandrine Bailleux
· 9 years ago
acde8b0
Rationalize reset handling code
by Sandrine Bailleux
· 10 years ago
979992e
Fix handling of spurious interrupts in BL3_1
by Achin Gupta
· 10 years ago
a877c25
Add support to indicate size and end of assembly functions
by Kévin Petit
· 10 years ago
9b38fc8
Initialise cpu ops after enabling data cache
by Vikram Kanigiri
· 10 years ago
36433d1
Call reset handlers upon BL3-1 entry.
by Yatharth Kochar
· 10 years ago
2ae2043
Remove coherent memory from the BL memory maps
by Soby Mathew
· 10 years ago
046cd3f
Miscellaneous documentation fixes
by Sandrine Bailleux
· 10 years ago
38b4bc9
Add CPU specific crash reporting handlers
by Soby Mathew
· 10 years ago
8e2f287
Add CPU specific power management operations
by Soby Mathew
· 10 years ago
c704cbc
Introduce framework for CPU specific operations
by Soby Mathew
· 10 years ago
ed1744e
Unmask SError interrupt and clear SCR_EL3.EA bit
by Achin Gupta
· 10 years ago
534ae7f
Merge pull request #179 from jcastillo-arm/jc/tf-issues/219
by danh-arm
· 10 years ago
b3dbeb0
Call platform_is_primary_cpu() only from reset handler
by Juan Castillo
· 10 years ago
2ed46e9
Optimize EL3 register state stored in cpu_context structure
by Soby Mathew
· 10 years ago
45c31c4
Merge pull request #172 from soby-mathew/sm/asm_assert
by danh-arm
· 10 years ago
0da9593
Add CPUECTLR_EL1 and Snoop Control register to crash reporting
by Soby Mathew
· 10 years ago
c1adbbc
Rework the crash reporting in BL3-1 to use less stack
by Soby Mathew
· 10 years ago
9f09835
Simplify management of SCTLR_EL3 and SCTLR_EL1
by Achin Gupta
· 10 years ago
e1aa516
Remove coherent stack usage from the warm boot path
by Achin Gupta
· 10 years ago
f4a9709
Remove coherent stack usage from the cold boot path
by Achin Gupta
· 10 years ago
258e94f
Allow FP register context to be optional at build time
by Juan Castillo
· 10 years ago
f268c72
Merge pull request #151 from vikramkanigiri/vk/t133-code-readability
by Andrew Thoelke
· 10 years ago
cf79bf5
Simplify entry point information generation code on FVP
by Vikram Kanigiri
· 10 years ago
4e12607
Initialise CPU contexts from entry_point_info
by Andrew Thoelke
· 10 years ago
4d2d553
Remove early_exceptions from BL3-1
by Andrew Thoelke
· 10 years ago
8c28fe0
Per-cpu data cache restructuring
by Andrew Thoelke
· 10 years ago
e385767
Merge pull request #133 from athoelke/at/crash-reporting-opt
by danh-arm
· 10 years ago
385f4d4
Make the BL3-1 crash reporting optional
by Andrew Thoelke
· 10 years ago
af1ef2b
Include 'platform_def.h' header file in 'crash_reporting.S'
by Sandrine Bailleux
· 11 years ago
93c89ec
Fix compilation issue for IMF_READ_INTERRUPT_ID build flag
by Soby Mathew
· 11 years ago
799f0ab
Pass 'cookie' parameter to interrupt handler in BL3-1
by Soby Mathew
· 11 years ago
701fea7
Further renames of platform porting functions
by Dan Handley
· 11 years ago
ed6ff95
Split platform.h into separate headers
by Dan Handley
· 11 years ago
9cf2bb7
Introduce interrupt handling framework in BL3-1
by Achin Gupta
· 11 years ago
9637745
Add support for BL3-1 as a reset vector
by Vikram Kanigiri
· 11 years ago
da56743
Populate BL31 input parameters as per new spec
by Vikram Kanigiri
· 11 years ago
a3a5e4a
Rework handover interface between BL stages
by Vikram Kanigiri
· 11 years ago
b058556
Merge pull request #78 from jeenuv:tf-issues-148
by Andrew Thoelke
· 11 years ago
d1b6015
Add build configuration for timer save/restore
by Jeenu Viswambharan
· 11 years ago
5e5c207
Rework BL3-1 unhandled exception handling and reporting
by Soby Mathew
· 11 years ago
9ceff0f
Merge pull request #63 from soby-mathew/sm/save_callee_saved_registers_in_cpu_context-1
by danh-arm
· 11 years ago
1644425
Merge pull request #62 from athoelke/set-little-endian-v2
by danh-arm
· 11 years ago
6c5192a
Preserve x19-x29 across world switch for exception handling
by Soby Mathew
· 11 years ago
f977ed8
Access system registers directly in assembler
by Andrew Thoelke
· 11 years ago
42e75a7
Correct usage of data and instruction barriers
by Andrew Thoelke
· 11 years ago
f994ffb
Set processor endianness immediately after RESET
by Andrew Thoelke
· 11 years ago
2bd4ef2
Reduce deep nesting of header files
by Dan Handley
· 11 years ago
714a0d2
Make use of user/system includes more consistent
by Dan Handley
· 11 years ago
65668f9
Allocate single stacks for BL1 and BL2
by Andrew Thoelke
· 11 years ago
a686542
Merge pull request #36 from athoelke/at/gc-sections-80
by danh-arm
· 11 years ago
3fa9847
Define frequency of system counter in platform code
by Sandrine Bailleux
· 11 years ago
74c1a2a
Revert "Move architecture timer setup to platform-specific code"
by Sandrine Bailleux
· 11 years ago
38bde41
Place assembler functions in separate sections
by Andrew Thoelke
· 11 years ago
9d8ba4c
Move per cpu exception stack in BL31 to tzfw_normal_stacks
by Vikram Kanigiri
· 11 years ago
78a6e0c
Remove partially qualified asm helper functions
by Vikram Kanigiri
· 11 years ago
5741894
Move architecture timer setup to platform-specific code
by Jeenu Viswambharan
· 11 years ago
35ca351
Add support for BL3-2 in BL3-1
by Achin Gupta
· 11 years ago
e4d084e
Rework BL2 to BL3-1 hand over interface
by Achin Gupta
· 11 years ago
a7934d6
Add exception vector guards
by Jeenu Viswambharan
· 11 years ago
caa8493
Add support for handling runtime service requests
by Jeenu Viswambharan
· 11 years ago
07f4e07
Introduce new exception handling framework
by Achin Gupta
· 11 years ago
9ac63c5
Add helper library for cpu context management
by Achin Gupta
· 11 years ago
b739f22
Setup VBAR_EL3 incrementally
by Achin Gupta
· 11 years ago
3a4cae0
Change comments in assembler files to help ctags
by Jeenu Viswambharan
· 11 years ago
4f60368
Do not trap access to floating point registers
by Harry Liebel
· 11 years ago
e83b0ca
Update year in copyright text to 2014
by Dan Handley
· 11 years ago
93ca221
Make BL31's ns_entry_info a single-cpu area
by Sandrine Bailleux
· 11 years ago
ba6980a
Move RUN_IMAGE constant from bl1.h to bl_common.h
by Sandrine Bailleux
· 11 years ago
4a826dd
rework general purpose registers save and restore
by Achin Gupta
· 11 years ago
ab2d31e
Enable third party contributions
by Dan Handley
· 11 years ago
65f546a
Properly initialise the C runtime environment
by Sandrine Bailleux
· 11 years ago
8d69a03
Various improvements/cleanups on the linker scripts
by Sandrine Bailleux
· 11 years ago
3738274
Unmask SError and Debug exceptions.
by Sandrine Bailleux
· 11 years ago
c10bd2c
Move generic architectural setup out of blx_plat_arch_setup().
by Sandrine Bailleux
· 11 years ago
4f6ad66
ARMv8 Trusted Firmware release v0.2
by Achin Gupta
· 11 years ago