1. 9246ab8 TBB: authenticate BL3-x images and certificates by Juan Castillo · 10 years ago
  2. d227d8b TBB: authenticate BL2 image and certificate by Juan Castillo · 10 years ago
  3. 9c25a40 TBB: add PolarSSL based authentication module by Juan Castillo · 10 years ago
  4. 11abdcd TBB: add tool to generate certificates by Juan Castillo · 10 years ago
  5. 09a16c0 Merge pull request #248 from jcastillo-arm/jc/tf-issues/212_1 by danh-arm · 10 years ago
  6. e33ee5f FVP: Allow BL3-2 to sit in the secure region of DRAM by Juan Castillo · 10 years ago
  7. 523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · 10 years ago
  8. f3e0218 FVP: map non-secure DRAM1 in the MMU by Juan Castillo · 10 years ago
  9. 42a617d FVP: keep shared data in Trusted SRAM by Juan Castillo · 10 years ago
  10. 383c477 Remove BSS section access by 'plat_print_gic' during crash reporting by Soby Mathew · 10 years ago
  11. 046cd3f Miscellaneous documentation fixes by Sandrine Bailleux · 10 years ago
  12. 1218f11 Rework use of labels in assembly macros. by Soby Mathew · 10 years ago
  13. 4fd2f5c Clarify platform porting interface to TSP by Dan Handley · 10 years ago
  14. be234f9 Remove platform dependency in CCI-400 driver by Dan Handley · 10 years ago
  15. 71ac11f Merge pull request #184 from jcastillo-arm/jc/tf-issues/100 by danh-arm · 10 years ago
  16. 48e84b3 FVP: make usage of Trusted DRAM optional at build time by Juan Castillo · 10 years ago
  17. 0d84657 Merge pull request #183 from danh-arm/dh/print_output2 by danh-arm · 10 years ago
  18. 91b624e Rationalize console log output by Dan Handley · 10 years ago
  19. 0c70c57 FVP: apply new naming conventions to memory regions by Juan Castillo · 10 years ago
  20. 0b6c706 Reduce the runtime stack size in BL stages. by Soby Mathew · 10 years ago
  21. b3dbeb0 Call platform_is_primary_cpu() only from reset handler by Juan Castillo · 10 years ago
  22. 45c31c4 Merge pull request #172 from soby-mathew/sm/asm_assert by danh-arm · 10 years ago
  23. 0da9593 Add CPUECTLR_EL1 and Snoop Control register to crash reporting by Soby Mathew · 10 years ago
  24. c1adbbc Rework the crash reporting in BL3-1 to use less stack by Soby Mathew · 10 years ago
  25. 9c60d80 Remove the concept of coherent stacks by Achin Gupta · 10 years ago
  26. 3c449d7 Merge pull request #163 from sandrine-bailleux/sb/tf-issue-117-v2 by danh-arm · 10 years ago
  27. e2e0c65 fvp: Reuse BL1 and BL2 memory through image overlaying by Sandrine Bailleux · 10 years ago
  28. 1c54d97 Refactor fvp_config into common platform header by Dan Handley · 10 years ago
  29. 043f846 Merge pull request #150 from sandrine-bailleux/sb/fix-plat-print-gic-regs by danh-arm · 10 years ago
  30. 21aa520 fvp: Fix register name in 'plat_print_gic_regs' macro by Sandrine Bailleux · 10 years ago
  31. fb06094 Merge pull request #145 from athoelke/at/psci-memory-optimization-v2 by danh-arm · 10 years ago
  32. 56f4470 Correctly dimension the PSCI aff_map_node array by Andrew Thoelke · 10 years ago
  33. 30b04fc Remove NSRAM from FVP memory map by Andrew Thoelke · 10 years ago
  34. ea45157 Rename FVP specific files and functions by Dan Handley · 11 years ago
  35. ed6ff95 Split platform.h into separate headers by Dan Handley · 11 years ago
  36. 5e5c207 Rework BL3-1 unhandled exception handling and reporting by Soby Mathew · 11 years ago