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filogic
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atf
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916ac6046b3d7a2a730e31ab12adab84488b6977
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lib
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cpus
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aarch64
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neoverse_n1.S
8649974
fix(security): workaround for CVE-2022-23960
by Bipin Ravi
· Tue Jan 18 01:59:06 2022 -0600
f1a84f5
Workaround for Cortex N1 erratum 1946160
by johpow01
· Wed Oct 07 14:33:15 2020 -0500
9faad3c
Add support for Neoverse-N2 CPUs.
by Javier Almansa Sobrino
· Fri Oct 23 13:22:07 2020 +0100
e2428fd
Workaround for Neoverse N1 erratum 1868343
by johpow01
· Wed Aug 05 12:27:12 2020 -0500
f01ea60
lib: cpu: Check SCU presence in DSU before accessing DSU registers
by Pramod Kumar
· Wed Feb 05 11:27:57 2020 +0530
eb8d429
Revert workaround for Neoverse N1 erratum 1800710
by johpow01
· Thu Jul 23 13:05:45 2020 -0500
6d9b5ee
Workaround for Neoverse N1 erratum 1800710
by johpow01
· Tue Jun 02 13:14:11 2020 -0500
3880a36
Neovers N1: added support to update presence of External LLC
by Manish Pandey
· Fri Jan 24 11:54:44 2020 +0000
0f7e601
Prevent speculative execution past ERET
by Anthony Steinhauser
· Tue Jan 07 15:44:06 2020 -0800
cd9a943
Fix white space errors + remove #if defined
by laurenw-arm
· Fri Oct 11 15:45:24 2019 -0500
94accd3
Neoverse N1 Errata Workaround 1542419
by laurenw-arm
· Tue Aug 20 15:51:24 2019 -0500
33e58f3
Fix for N1 1043202 Errata Workaround
by laurenw-arm
· Mon Aug 19 11:06:18 2019 -0500
cf12f26
Removing redundant ISB instructions
by lauwal01
· Thu Jun 27 11:03:25 2019 -0500
644b6ed
Workaround for Neoverse N1 erratum 1275112
by lauwal01
· Mon Jun 24 11:49:01 2019 -0500
00396bf
Workaround for Neoverse N1 erratum 1262888
by lauwal01
· Mon Jun 24 11:47:30 2019 -0500
42771af
Workaround for Neoverse N1 erratum 1262606
by lauwal01
· Mon Jun 24 11:44:58 2019 -0500
07c2a23
Workaround for Neoverse N1 erratum 1257314
by lauwal01
· Mon Jun 24 11:42:02 2019 -0500
197f14c
Workaround for Neoverse N1 erratum 1220197
by lauwal01
· Mon Jun 24 11:38:53 2019 -0500
e159044
Workaround for Neoverse N1 erratum 1207823
by lauwal01
· Mon Jun 24 11:35:37 2019 -0500
f2adb13
Workaround for Neoverse N1 erratum 1165347
by lauwal01
· Mon Jun 24 11:32:40 2019 -0500
363ee3c
Workaround for Neoverse N1 erratum 1130799
by lauwal01
· Mon Jun 24 11:28:34 2019 -0500
bd555f4
Workaround for Neoverse N1 erratum 1073348
by lauwal01
· Mon Jun 24 11:23:50 2019 -0500
8b8b13b
DSU: Apply erratum 936184 for Neoverse N1/E1
by Louis Mayencourt
· Mon Jun 10 16:43:39 2019 +0100
401cc1f
Merge "Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703" into integration
by John Tsichritzis
· Fri Jun 07 15:20:45 2019 +0000
b934740
Neoverse N1: Introduce workaround for Neoverse N1 erratum 1315703
by Andre Przywara
· Mon May 20 14:57:06 2019 +0100
7557c66
Apply compile-time check for AArch64-only cores
by John Tsichritzis
· Mon Jun 03 13:54:30 2019 +0100
a8722e9
Disable speculative loads only if SSBS is supported
by Sami Mujawar
· Fri May 10 14:28:37 2019 +0100
fe6df39
Add compile-time errors for HW_ASSISTED_COHERENCY flag
by John Tsichritzis
· Tue Mar 19 17:20:52 2019 +0000
b58142b
Neoverse N1: Forces cacheable atomic to near
by Louis Mayencourt
· Thu Apr 18 14:34:11 2019 +0100
1f9ff49
Apply variant 4 mitigation for Neoverse N1
by John Tsichritzis
· Mon Mar 04 16:41:26 2019 +0000
56369c1
Rename Cortex-Ares to Neoverse N1
by John Tsichritzis
· Tue Feb 19 13:49:06 2019 +0000
97ff6d0
Rename Cortex-Ares filenames to Neoverse N1
by John Tsichritzis
· Tue Feb 19 13:48:44 2019 +0000
[Renamed from lib/cpus/aarch64/cortex_ares.S]
5e7e4a7
Fix the Cortex-ares errata reporting function name
by Soby Mathew
· Mon Sep 10 11:14:01 2018 +0100
7ca21db
Implement Cortex-Ares 1043202 erratum workaround
by Dimitris Papastamos
· Mon Mar 26 16:46:01 2018 +0100
89736dd
Add AMU support for Cortex-Ares
by Dimitris Papastamos
· Tue Feb 13 11:28:02 2018 +0000
ea84d6b
Add support for Cortex-Ares and Cortex-A76 CPUs
by Isla Mitchell
· Thu Aug 03 16:04:46 2017 +0100