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git01.mediatek.com / filogic / atf / 90a323053b574dba4f16581634ab8a6ab0a98e2a / plat
  1. ebca282 Merge "stm32mp1: register shared resource per GPIO bank/pin" into integration by Madhukar Pappireddy · Thu Jul 16 14:40:07 2020 +0000
  2. 0a9e5dd Merge "stm32mp1: register shared resource per IOMEM address" into integration by Madhukar Pappireddy · Thu Jul 16 14:39:13 2020 +0000
  3. e732146 Merge "stm32mp1: allow non-secure access to reset upon periph registration" into integration by Madhukar Pappireddy · Thu Jul 16 14:39:03 2020 +0000
  4. c337a3d Merge "stm32mp1: allow non-secure access to clocks upon periph registration" into integration by Madhukar Pappireddy · Thu Jul 16 14:38:58 2020 +0000
  5. a6bde4d Merge "stm32mp1: shared resources: peripheral registering" into integration by Madhukar Pappireddy · Thu Jul 16 14:38:52 2020 +0000
  6. 6c18b07 Merge "stm32mp1: shared resources: add trace messages" into integration by Madhukar Pappireddy · Thu Jul 16 14:38:41 2020 +0000
  7. a4370d6 Merge changes from topic "fpga_cmdline" into integration by André Przywara · Wed Jul 15 22:07:00 2020 +0000
  8. 1415634 Merge "SPMD: fix boundary check if manifest is page aligned" into integration by Manish Pandey · Tue Jul 14 10:23:56 2020 +0000
  9. bc62d15 SPMD: fix boundary check if manifest is page aligned by Manish Pandey · Thu Jul 09 00:39:16 2020 +0100
  10. c3810b4 Merge "plat/arm: Fix build failure due to increase in BL2 size" into integration by Madhukar Pappireddy · Mon Jul 13 14:38:40 2020 +0000
  11. 1856cc9 plat/arm: Fix build failure due to increase in BL2 size by Manish V Badarkhe · Fri Jul 10 09:44:21 2020 +0100
  12. f681b93 plat: marvell: armada: mcbin: squash several IO windows into one by Grzegorz Jaszczyk · Mon Jun 10 17:01:05 2019 +0200
  13. 35b75f0 plat: marvell: armada: fix BL32 extra parameters usage by Marcin Wojtas · Wed Nov 13 13:31:48 2019 +0100
  14. 2850326 plat: marvell: armada: a8k: change CCU LLC SRAM mapping by Konstantin Porotchkin · Mon Apr 15 16:32:59 2019 +0300
  15. b5fa64a plat: marvell: armada: adjust trusted DRAM size to match OP-TEE OS by Konstantin Porotchkin · Mon Apr 15 16:25:59 2019 +0300
  16. 7588ae2 plat: marvell: armada: move mg conf related code to appropriate driver by Grzegorz Jaszczyk · Wed Apr 17 11:24:43 2019 +0200
  17. 65b9afa drivers: marvell: mg_conf_cm3: add basic driver by Grzegorz Jaszczyk · Fri Apr 12 16:53:49 2019 +0200
  18. 0bafa82 plat/arm, dts: Update platform device tree for CoT by Manish V Badarkhe · Mon Jun 29 11:14:07 2020 +0100
  19. d9b95cc arm_fpga: Predefine DTB and BL33 load addresses by Andre Przywara · Wed Jul 08 13:01:00 2020 +0100
  20. cb16767 arm_fpga: Add Klein and Matterhorn support by Andre Przywara · Thu Jun 25 13:10:38 2020 +0100
  21. b1402c8 arm_fpga: Support more CPU clusters by Andre Przywara · Thu Jun 25 13:10:38 2020 +0100
  22. 63b2206 stm32mp1: register shared resource per GPIO bank/pin by Etienne Carriere · Wed May 13 10:19:50 2020 +0200
  23. 0cfbff9 stm32mp1: register shared resource per IOMEM address by Etienne Carriere · Wed May 13 10:16:21 2020 +0200
  24. c8d47a7 stm32mp1: allow non-secure access to reset upon periph registration by Etienne Carriere · Wed May 13 13:53:15 2020 +0200
  25. 875f85a stm32mp1: allow non-secure access to clocks upon periph registration by Etienne Carriere · Wed May 13 10:20:34 2020 +0200
  26. 1bbb924 stm32mp1: shared resources: peripheral registering by Etienne Carriere · Wed May 13 14:22:01 2020 +0200
  27. e704f99 stm32mp1: shared resources: add trace messages by Etienne Carriere · Wed May 13 15:51:56 2020 +0200
  28. b7c045a Merge "Upgrade libfdt source files" into integration by Sandrine Bailleux · Wed Jul 08 06:54:39 2020 +0000
  29. f8e6c63 Merge "corstone700: splitting the platform support into FVP and FPGA" into integration by Manish Pandey · Tue Jul 07 15:49:14 2020 +0000
  30. 95294c9 corstone700: splitting the platform support into FVP and FPGA by Abdellatif El Khlifi · Mon Jul 06 16:15:23 2020 +0100
  31. ac295aa Merge "arm_fpga: Fix MPIDR topology checks" into integration by Madhukar Pappireddy · Thu Jul 02 23:47:50 2020 +0000
  32. a5b7388 Merge changes from topic "stm32-shres" into integration by Mark Dykes · Thu Jul 02 16:11:10 2020 +0000
  33. fb167ca Merge "stm32mp1: introduce shared resources support" into integration by Mark Dykes · Thu Jul 02 16:10:12 2020 +0000
  34. bffb81e Merge "plat/arm: Add assert for the valid address of dtb information" into integration by Sandrine Bailleux · Tue Jun 30 12:12:32 2020 +0000
  35. b94bd05 Merge "stm32mp1: disable neon in sp_min" into integration by Mark Dykes · Mon Jun 29 15:59:45 2020 +0000
  36. 5f8d417 Merge "stm32mp1: check stronger the secondary CPU entry point" into integration by Mark Dykes · Mon Jun 29 15:58:23 2020 +0000
  37. 9cb29f0 plat/arm: Add assert for the valid address of dtb information by Manish V Badarkhe · Mon Jun 29 07:17:24 2020 +0100
  38. 62d401a allwinner: Disable NS access to PRCM power control registers by Samuel Holland · Sun Dec 29 16:12:12 2019 -0600
  39. 596fe0a Upgrade libfdt source files by Madhukar Pappireddy · Mon Jun 15 17:19:09 2020 -0500
  40. 1934d51 Merge changes Ib9c82b85,Ib348e097,I4dc315e4,I58a8ce44,Iebc03361, ... into integration by Manish Pandey · Fri Jun 26 13:59:38 2020 +0000
  41. 43318de arm_fpga: Fix MPIDR topology checks by Andre Przywara · Thu Jun 25 13:10:13 2020 +0100
  42. 8717e03 plat/arm: Use only fw_config between bl2 and bl31 by Manish V Badarkhe · Sat May 30 17:40:44 2020 +0100
  43. 8d0effa Merge changes from topic "fw_config_handoff" into integration by Sandrine Bailleux · Fri Jun 26 07:06:52 2020 +0000
  44. 81200ac Merge "stm32mp1: use last page of SYSRAM as SCMI shared memory" into integration by Mark Dykes · Thu Jun 25 18:37:51 2020 +0000
  45. df6075e Merge "stm32mp1: SP_MIN embeds Arm Architecture services" into integration by Mark Dykes · Thu Jun 25 18:33:27 2020 +0000
  46. 61acf62 Merge "plat/fvp: Dynamic description of clock freq" into integration by Mark Dykes · Thu Jun 25 18:20:21 2020 +0000
  47. 38bd575 Merge "fconf: Extract Timer clock freq from HW_CONFIG dtb" into integration by Mark Dykes · Thu Jun 25 18:18:57 2020 +0000
  48. fbf1fd2 plat/arm: Increase size of firmware configuration area by Manish V Badarkhe · Tue Jun 09 11:31:17 2020 +0100
  49. 99a8e14 plat/arm: Load and populate fw_config and tb_fw_config by Manish V Badarkhe · Thu Jun 11 22:32:11 2020 +0100
  50. 9656a30 plat/fvp: Dynamic description of clock freq by laurenw-arm · Wed Jun 10 16:33:18 2020 -0500
  51. fc3e7a2 fconf: Extract Timer clock freq from HW_CONFIG dtb by laurenw-arm · Thu Feb 06 11:42:18 2020 -0600
  52. 8c66f7a plat/arm: Update the fw_config load call and populate it's information by Manish V Badarkhe · Thu Jun 11 22:09:10 2020 +0100
  53. 1da211a fconf: Clean confused naming between TB_FW and FW_CONFIG by Manish V Badarkhe · Sun May 31 10:17:59 2020 +0100
  54. 244027d tbbr/dualroot: Add fw_config image in chain of trust by Louis Mayencourt · Thu Jun 11 21:15:15 2020 +0100
  55. 64616a5 plat/arm: Rentroduce tb_fw_config device tree by Manish V Badarkhe · Sun May 31 08:53:40 2020 +0100
  56. 2396cde Fix usage of incorrect function name by Sheetal Tigadoli · Tue Jun 23 21:12:28 2020 +0530
  57. 196c2ac stm32mp1: SP_MIN embeds Arm Architecture services by Etienne Carriere · Tue Jun 23 09:26:15 2020 +0200
  58. 72369b1 stm32mp1: use last page of SYSRAM as SCMI shared memory by Etienne Carriere · Sun Dec 08 08:17:56 2019 +0100
  59. 5a0f82f stm32mp1: check stronger the secondary CPU entry point by Etienne Carriere · Mon Jun 08 20:25:08 2020 +0200
  60. ca651fb stm32mp1: disable neon in sp_min by Etienne Carriere · Fri Apr 10 18:51:54 2020 +0200
  61. 7a4a34f stm32mp1: shared resources: apply registered configuration by Etienne Carriere · Wed May 13 10:07:45 2020 +0200
  62. beb53d9 stm32mp1: shared resources: count GPIOZ bank pins by Etienne Carriere · Wed May 13 10:13:54 2020 +0200
  63. 316d634 stm32mp1: shared resources: define resource identifiers by Etienne Carriere · Mon Dec 02 10:08:48 2019 +0100
  64. 7ad2c01 stm32mp1: introduce shared resources support by Etienne Carriere · Sun Dec 08 08:14:03 2019 +0100
  65. fb272c7 Merge changes from topic "tegra-memctrlv2-vpr-resize-bugfix" into integration by Manish Pandey · Mon Jun 22 21:45:12 2020 +0000
  66. 11f5db5 Tegra: sanity check NS address and size before use by Varun Wadekar · Tue Jun 02 21:16:00 2020 -0700
  67. 841ffeb plat: marvell: armada: a8k: add OP-TEE OS MMU tables by Konstantin Porotchkin · Mon Apr 15 16:29:08 2019 +0300
  68. 2ef36a3 drivers: marvell: add support for mapping the entire LLC to SRAM by Konstantin Porotchkin · Sun Mar 31 16:58:11 2019 +0300
  69. 03f3541 plat: marvell: armada: add LLC SRAM CCU setup for AP806/AP807 platforms by Konstantin Porotchkin · Sun Mar 31 17:16:35 2019 +0300
  70. d2a19cc plat: marvell: armada: reduce memory size reserved for FIP image by Marcin Wojtas · Fri Jun 19 17:51:08 2020 +0200
  71. 5f8630b plat: marvell: armada: platform definitions cleanup by Konstantin Porotchkin · Fri Jun 19 17:48:48 2020 +0200
  72. ac2cf92 plat: marvell: armada: a8k: check CCU window state before loading MSS BL2 by Konstantin Porotchkin · Sun Mar 31 17:22:53 2019 +0300
  73. fa8c130 drivers: marvell: align and extend llc macros by Konstantin Porotchkin · Mon Mar 25 15:35:41 2019 +0200
  74. 7947359 plat: marvell: a8k: move address config of cp1/2 to BL2 by Ben Peled · Tue Mar 26 19:06:24 2019 +0200
  75. 459366b plat: marvell: armada: re-enable BL32_BASE definition by Konstantin Porotchkin · Thu Mar 14 17:24:40 2019 +0200
  76. d3d6a1c plat: marvell: a8k: extend includes to take advantage of the phy_porting_layer by Grzegorz Jaszczyk · Thu Mar 28 16:09:38 2019 +0100
  77. 95ad87c plat: marvell: armada: configure amb for all CPs by Grzegorz Jaszczyk · Fri Apr 12 12:56:07 2019 +0200
  78. 5b7c50d Tegra: introduce support for GICv3 by Varun Wadekar · Thu Jun 11 21:53:09 2020 -0700
  79. e31d083 Tegra: memctrl_v2: fixup sequence to resize video memory by Varun Wadekar · Tue Jun 02 21:08:38 2020 -0700
  80. 45f1655 plat: marvell: armada: modify PLAT_FAMILY name for 37xx SoCs by Marcin Wojtas · Thu Jun 18 19:50:47 2020 +0200
  81. 46c4b14 Merge changes I80316689,I23cac4fb,If911e7de,I169ff358,I4e040cd5, ... into integration by Manish Pandey · Wed Jun 17 19:44:51 2020 +0000
  82. 6eaaec1 plat/arm: Fix load address of TB_FW_CONFIG by Manish V Badarkhe · Tue Jun 09 09:09:39 2020 +0100
  83. c14ae53 Tegra194: ras: verbose prints for SErrors by David Pu · Thu May 16 17:20:27 2019 -0700
  84. 6718842 Tegra194: SiP: clear RAS corrected error records by Varun Wadekar · Thu Mar 21 08:23:05 2019 -0700
  85. 70f6597 Tegra194: add RAS exception handling by David Pu · Mon Mar 18 15:14:49 2019 -0700
  86. 2de9a5d Merge "rockchip: rk3368: fix PLAT_RK_CLST_TO_CPUID_SHIFT" into integration by Madhukar Pappireddy · Thu Jun 11 17:51:07 2020 +0000
  87. bcac995 Merge "GICv3: GIC-600: Detect GIC-600 at runtime" into integration by Madhukar Pappireddy · Tue Jun 09 20:17:39 2020 +0000
  88. 7e067e3 rockchip: rk3368: fix PLAT_RK_CLST_TO_CPUID_SHIFT by Philipp Tomsich · Wed Jul 05 12:20:44 2017 +0200
  89. ae58772 Merge changes from topic "sp_secure_boot" into integration by Manish Pandey · Tue Jun 09 19:47:04 2020 +0000
  90. 02cc3ff plat/fvp: Add support for dynamic description of secure interrupts by Madhukar Pappireddy · Tue Jun 02 09:26:30 2020 -0500
  91. e1cc130 GICv3: GIC-600: Detect GIC-600 at runtime by Andre Przywara · Wed Mar 25 15:50:38 2020 +0000
  92. 5f8e1a0 dualroot: add chain of trust for secure partitions by Manish Pandey · Wed May 27 22:40:10 2020 +0100
  93. 883322b Merge "plat/arm: do not include export header directly" into integration by Sandrine Bailleux · Tue Jun 09 15:10:37 2020 +0000
  94. 6e74bc7 Merge "rockchip: increase FDT buffer size" into integration by Madhukar Pappireddy · Tue Jun 09 13:56:40 2020 +0000
  95. 64d2b2f plat: intel: Additional instruction required to enable global timer by Tien Hock Loh · Mon May 11 01:12:03 2020 -0700
  96. 070ffbb plat: intel: Fix CCU initialization for Agilex by Tien Hock Loh · Mon May 11 01:11:55 2020 -0700
  97. ee96cda rockchip: increase FDT buffer size by Hugh Cole-Baker · Mon Jun 08 22:24:36 2020 +0100
  98. c5baddf plat: intel: Add FPGAINTF configuration to when configuring pinmux by Tien Hock Loh · Mon May 11 01:11:48 2020 -0700
  99. fcbc33d plat: intel: set DRVSEL and SMPLSEL for DWMMC by Tien Hock Loh · Mon May 11 01:11:39 2020 -0700
  100. 7a5f8da plat: intel: Fix clock configuration bugs by Tien Hock Loh · Mon May 11 01:11:23 2020 -0700