1. 8ca0af2 Workaround for CVE-2017-5715 for Cortex A9, A15 and A17 by Dimitris Papastamos · 7 years ago
  2. 41b0094 Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS by Matt Ma · 7 years ago
  3. c3b4ca1 Cortex-A72: Implement workaround for erratum 859971 by Eleanor Bonnici · 7 years ago
  4. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  5. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  6. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  7. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · 8 years ago