1. 1fbc97b Correct typographical errors by Paul Beesley · Fri Jan 11 18:26:51 2019 +0000
  2. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  3. 8942a1b Ensure the flow through switch statements is clear by Daniel Boulby · Fri Jun 22 14:16:03 2018 +0100
  4. eace8f1 Make TF UUID RFC 4122 compliant by Roberto Vargas · Thu Apr 26 13:36:53 2018 +0100
  5. 5ac9d96 Fix pointer type mismatch of handlers by Masahiro Yamada · Thu Apr 19 01:18:48 2018 +0900
  6. 5621275 spd: add static qualifier to locally used functions and data by Masahiro Yamada · Thu Apr 19 01:14:42 2018 +0900
  7. 75a5d8b services: fix switch statements to comply with MISRA rules by Jonathan Wright · Wed Mar 14 15:56:21 2018 +0000
  8. abf5b06 TSPD: Register preempted SMC error code with EHF by Jeenu Viswambharan · Mon Jan 22 12:42:54 2018 +0000
  9. 339580c TSPD: Explicitly allow NS preemption for Yielding SMCs by Jeenu Viswambharan · Wed Jan 10 15:22:49 2018 +0000
  10. 9930501 Fix order of #includes by Isla Mitchell · Tue Jul 11 14:54:08 2017 +0100
  11. f251a4c Merge pull request #925 from dp-arm/dp/spdx by davidcunado-arm · Thu May 04 16:35:19 2017 +0100
  12. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  13. 7dc9133 Merge pull request #919 from davidcunado-arm/dc/smc_yielding_generic by davidcunado-arm · Tue May 02 16:32:20 2017 +0100
  14. 28f69ab Update terminology: standard SMC to yielding SMC by David Cunado · Wed Apr 05 11:34:03 2017 +0100
  15. acb2914 tspd:FWU:Fix usage of SMC_RET0 by Antonio Nino Diaz · Tue Apr 04 17:08:32 2017 +0100
  16. bcc3dd3 Fix TSPD implementation of STD SMC ABORT by Douglas Raillard · Fri Feb 03 18:01:51 2017 +0000
  17. f212965 Abort preempted TSP STD SMC after PSCI CPU suspend by Douglas Raillard · Thu Nov 24 15:43:19 2016 +0000
  18. f4119ec Miscellaneous doc fixes for v1.2 by Sandrine Bailleux · Thu Dec 17 13:58:58 2015 +0000
  19. 7866424 TSP: Allow preemption of synchronous S-EL1 interrupt handling by Soby Mathew · Fri Nov 13 02:08:43 2015 +0000
  20. bec9851 Enable use of FIQs and IRQs as TSP interrupts by Soby Mathew · Thu Sep 03 18:29:38 2015 +0100
  21. bc91282 Unify interrupt return paths from TSP into the TSPD by Soby Mathew · Tue Sep 22 12:01:18 2015 +0100
  22. c5204fa Remove the IMF_READ_INTERRUPT_ID build option by Soby Mathew · Tue Oct 27 10:01:06 2015 +0000
  23. da43b66 PSCI: Migrate SPDs and TSP to the new platform and framework API by Soby Mathew · Wed Jul 08 21:45:46 2015 +0100
  24. 47903c0 Demonstrate model for routing IRQs to EL3 by Soby Mathew · Tue Jan 13 15:48:26 2015 +0000
  25. 4dc4a47 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · Tue Aug 12 11:17:06 2014 +0100
  26. 4e81341 Support asynchronous method for BL3-2 initialization by Vikram Kanigiri · Tue Jul 15 16:49:22 2014 +0100
  27. 9d70f0f Rework the TSPD setup code by Vikram Kanigiri · Tue Jul 15 16:46:43 2014 +0100
  28. 4e12607 Initialise CPU contexts from entry_point_info by Andrew Thoelke · Wed Jun 04 21:10:52 2014 +0100
  29. a2f6553 Provide cm_get/set_context() for current CPU by Andrew Thoelke · Wed May 14 17:09:32 2014 +0100
  30. 93c89ec Fix compilation issue for IMF_READ_INTERRUPT_ID build flag by Soby Mathew · Wed May 28 17:14:36 2014 +0100
  31. 459df4c Merge pull request #110 from soby-mathew:sm/support_normal_irq_in_tsp-v4 into for-v0.4 by Dan Handley · Tue May 27 18:46:22 2014 +0100
  32. 701fea7 Further renames of platform porting functions by Dan Handley · Tue May 27 16:17:21 2014 +0100
  33. 3d57851 Fixup Standard SMC Resume Handling by Soby Mathew · Tue May 27 10:20:01 2014 +0100
  34. 891c4ca Use a vector table for TSP entrypoints by Andrew Thoelke · Tue May 20 21:43:27 2014 +0100
  35. 9f71f70 Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · Fri May 09 20:49:17 2014 +0100
  36. aeaab68 Add S-EL1 interrupt handling support in the TSPD by Achin Gupta · Fri May 09 13:21:31 2014 +0100
  37. 27b895e Add context library API to change a bit in SCR_EL3 by Achin Gupta · Sun May 04 18:38:28 2014 +0100
  38. 18d6eaf Rework 'state' field usage in per-cpu TSP context by Achin Gupta · Sun May 04 18:23:26 2014 +0100
  39. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · Fri May 16 18:48:12 2014 +0100
  40. da56743 Populate BL31 input parameters as per new spec by Vikram Kanigiri · Tue Apr 15 18:08:08 2014 +0100
  41. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · Wed Apr 09 13:14:54 2014 +0100
  42. e2712bc Always use named structs in header files by Dan Handley · Thu Apr 10 15:37:22 2014 +0100
  43. 714a0d2 Make use of user/system includes more consistent by Dan Handley · Wed Apr 09 13:13:04 2014 +0100
  44. df1ddb5 Implement standard calls for TSP by Jeenu Viswambharan · Fri Feb 28 11:23:35 2014 +0000
  45. 7f36660 Implement late binding for runtime hooks by Jeenu Viswambharan · Thu Feb 20 17:11:00 2014 +0000
  46. 916a2c1 Rework arithmetic operations in Test Secure Payload by Achin Gupta · Sun Feb 09 23:11:46 2014 +0000
  47. 607084e Add power management support in the SPD by Achin Gupta · Sun Feb 09 18:24:19 2014 +0000
  48. 375f538 Add Test Secure Payload Dispatcher (TSPD) service by Achin Gupta · Tue Feb 18 18:12:48 2014 +0000