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git01.mediatek.com / filogic / atf / 7b4ecc5d3129e4711cd1bff4bc36748ec0b80768 / bl32
  1. 1fecc8d Merge pull request #860 from jeenu-arm/hw-asstd-coh by davidcunado-arm · Fri Mar 17 12:34:37 2017 +0000
  2. 4ef91f1 Simplify translation tables headers dependencies by Antonio Nino Diaz · Mon Feb 20 14:22:22 2017 +0000
  3. 4614496 Enable data caches early with hardware-assisted coherency by Jeenu Viswambharan · Thu Jan 05 10:37:21 2017 +0000
  4. a8954fc Replace some memset call by zeromem by Douglas Raillard · Thu Jan 26 15:54:44 2017 +0000
  5. 21362a9 Introduce unified API to zero memory by Douglas Raillard · Fri Dec 02 13:51:54 2016 +0000
  6. f212965 Abort preempted TSP STD SMC after PSCI CPU suspend by Douglas Raillard · Thu Nov 24 15:43:19 2016 +0000
  7. b54c1a5 Merge pull request #775 from soby-mathew/sm/AArch32_stack_align by danh-arm · Wed Dec 14 09:25:15 2016 +0000
  8. adb7027 AArch32: Fix the stack alignment issue by Soby Mathew · Tue Dec 06 12:10:51 2016 +0000
  9. 68aef10 Define and use no_ret macro where no return is expected by Jeenu Viswambharan · Wed Nov 30 15:21:11 2016 +0000
  10. 8da8966 PSCI: Do psci_setup() as part of std_svc_setup() by Soby Mathew · Mon Sep 19 17:21:15 2016 +0100
  11. 89256b8 PSCI: Introduce PSCI Library argument structure by Soby Mathew · Tue Sep 13 14:19:08 2016 +0100
  12. 1c16a4c AArch32: Support in SP_MIN to receive arguments from BL2 by Yatharth Kochar · Thu Jun 30 14:50:58 2016 +0100
  13. 06460cd AArch32: Refactor SP_MIN to support RESET_TO_SP_MIN by Yatharth Kochar · Thu Jun 30 15:02:31 2016 +0100
  14. ec8ac1c AArch32: add a minimal secure payload (SP_MIN) by Soby Mathew · Thu May 05 14:32:05 2016 +0100
  15. 7b5c9b3 Move spinlock library code to AArch64 folder by Soby Mathew · Mon Aug 08 12:42:53 2016 +0100
  16. bdba5e5 TSP: Print BL32_BASE rather than __RO_START__ by Sandrine Bailleux · Thu Jun 16 14:24:26 2016 +0100
  17. f91f144 Introduce SEPARATE_CODE_AND_RODATA build flag by Sandrine Bailleux · Fri Jul 08 14:37:40 2016 +0100
  18. 9e6ad6c Introduce some helper macros for exception vectors by Sandrine Bailleux · Tue May 24 16:56:03 2016 +0100
  19. f269714 Make:Remove calls to shell from makefiles. by Evan Lloyd · Wed Dec 02 18:17:37 2015 +0000
  20. 1f21bcf Remove all non-configurable dead loops by Antonio Nino Diaz · Mon Feb 01 13:57:25 2016 +0000
  21. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · Mon Dec 14 09:35:25 2015 +0000
  22. 7866424 TSP: Allow preemption of synchronous S-EL1 interrupt handling by Soby Mathew · Fri Nov 13 02:08:43 2015 +0000
  23. bec9851 Enable use of FIQs and IRQs as TSP interrupts by Soby Mathew · Thu Sep 03 18:29:38 2015 +0100
  24. bc91282 Unify interrupt return paths from TSP into the TSPD by Soby Mathew · Tue Sep 22 12:01:18 2015 +0100
  25. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · Fri Sep 11 16:03:13 2015 +0100
  26. 9a0ff9b Pass the target suspend level to SPD suspend hooks by Achin Gupta · Mon Sep 07 20:43:27 2015 +0100
  27. da43b66 PSCI: Migrate SPDs and TSP to the new platform and framework API by Soby Mathew · Wed Jul 08 21:45:46 2015 +0100
  28. f05c1b5 Add linker symbol declarations to bl_common.h by Dan Handley · Mon Apr 27 11:49:22 2015 +0100
  29. 81be100 Allow deeper platform port directory structure by Dan Handley · Fri Mar 27 17:44:35 2015 +0000
  30. eb839ce Fix type mismatches in verbose logging by Dan Handley · Mon Mar 23 18:13:33 2015 +0000
  31. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
  32. 8723adf Enable type-checking of arguments passed to printf() et al. by Sandrine Bailleux · Thu Feb 05 15:42:31 2015 +0000
  33. f512157 Save 'power_state' early in PSCI CPU_SUSPEND call by Soby Mathew · Tue Sep 30 11:19:51 2014 +0100
  34. 2ae2043 Remove coherent memory from the BL memory maps by Soby Mathew · Thu Jan 08 18:02:44 2015 +0000
  35. 1fe4336 Juno: Add support for Test Secure-EL1 Payload by Sandrine Bailleux · Thu Jul 17 09:56:29 2014 +0100
  36. 4dc4a47 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · Tue Aug 12 11:17:06 2014 +0100
  37. 9e46188 Merge pull request #189 from achingupta/ag/tf-issues#153 by Dan Handley · Tue Aug 19 11:04:21 2014 +0100
  38. 4fd2f5c Clarify platform porting interface to TSP by Dan Handley · Mon Aug 04 11:41:20 2014 +0100
  39. ed1744e Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · Mon Aug 04 23:13:10 2014 +0100
  40. e2c27f5 Move TSP private declarations into separate header by Dan Handley · Fri Aug 01 17:58:27 2014 +0100
  41. 91b624e Rationalize console log output by Dan Handley · Tue Jul 29 17:14:00 2014 +0100
  42. 534ae7f Merge pull request #179 from jcastillo-arm/jc/tf-issues/219 by danh-arm · Mon Aug 04 10:34:18 2014 +0100
  43. 4e81341 Support asynchronous method for BL3-2 initialization by Vikram Kanigiri · Tue Jul 15 16:49:22 2014 +0100
  44. b3dbeb0 Call platform_is_primary_cpu() only from reset handler by Juan Castillo · Wed Jul 16 15:53:43 2014 +0100
  45. 3299181 Merge pull request #170 from achingupta/ag/tf-issues#226 by danh-arm · Mon Jul 28 14:27:25 2014 +0100
  46. 289162c Merge pull request #169 from achingupta/ag/tf-issues#198 by danh-arm · Mon Jul 28 14:24:52 2014 +0100
  47. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · Fri Jul 18 18:38:28 2014 +0100
  48. 04be3a5 Add support for printing version at runtime by Juan Castillo · Mon Jun 30 11:41:46 2014 +0100
  49. afe7e2f Implement a leaner printf for Trusted Firmware by Soby Mathew · Thu Jun 12 17:23:58 2014 +0100
  50. e1aa516 Remove coherent stack usage from the warm boot path by Achin Gupta · Thu Jun 26 09:58:52 2014 +0100
  51. f4a9709 Remove coherent stack usage from the cold boot path by Achin Gupta · Wed Jun 25 19:26:22 2014 +0100
  52. 3c449d7 Merge pull request #163 from sandrine-bailleux/sb/tf-issue-117-v2 by danh-arm · Fri Jul 11 11:19:27 2014 +0100
  53. e2e0c65 fvp: Reuse BL1 and BL2 memory through image overlaying by Sandrine Bailleux · Mon Jun 16 16:12:27 2014 +0100
  54. fb42b12 Refactor fvp gic code to be a generic driver by Dan Handley · Fri Jun 20 09:43:15 2014 +0100
  55. 2d55240 Remove all checkpatch errors from codebase by Juan Castillo · Fri Jun 13 17:05:10 2014 +0100
  56. 701fea7 Further renames of platform porting functions by Dan Handley · Tue May 27 16:17:21 2014 +0100
  57. b226a4d Add enable mmu platform porting interfaces by Dan Handley · Fri May 16 14:08:45 2014 +0100
  58. ea45157 Rename FVP specific files and functions by Dan Handley · Thu May 15 14:53:30 2014 +0100
  59. 7ce42df Move BL porting functions into platform.h by Dan Handley · Thu May 15 14:11:36 2014 +0100
  60. ed6ff95 Split platform.h into separate headers by Dan Handley · Wed May 14 17:44:19 2014 +0100
  61. 335bf58 Merge pull request #101 from sandrine-bailleux:sb/tf-issue-81-v2 by Andrew Thoelke · Fri May 23 12:14:37 2014 +0100
  62. 6c8b359 Make the memory layout more flexible by Sandrine Bailleux · Thu May 22 15:28:26 2014 +0100
  63. 332ff85 Merge pull request #104 from athoelke:at/tsp-entrypoints-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  64. 077193f Merge pull request #105 from athoelke:sm/support_normal_irq_in_tsp-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  65. 58484d4 Merge pull request #102 from achingupta:ag/tf-issues#104-v2 by Andrew Thoelke · Fri May 23 11:00:04 2014 +0100
  66. 891c4ca Use a vector table for TSP entrypoints by Andrew Thoelke · Tue May 20 21:43:27 2014 +0100
  67. 9f71f70 Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · Fri May 09 20:49:17 2014 +0100
  68. bbc33f2 Enable secure timer to generate S-EL1 interrupts by Achin Gupta · Fri May 09 13:33:42 2014 +0100
  69. a4f50c2 Add support for asynchronous FIQ handling in TSP by Achin Gupta · Fri May 09 12:17:56 2014 +0100
  70. 7671789 Add support for synchronous FIQ handling in TSP by Achin Gupta · Fri May 09 11:42:56 2014 +0100
  71. 405406d Use secure timer to generate S-EL1 interrupts by Achin Gupta · Fri May 09 12:00:17 2014 +0100
  72. e701e30 fvp: Move TSP from Secure DRAM to Secure SRAM by Sandrine Bailleux · Tue May 20 17:28:25 2014 +0100
  73. 5ac3cc9 TSP: Let the platform decide which secure memory to use by Sandrine Bailleux · Tue May 20 17:22:24 2014 +0100
  74. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · Fri May 16 18:48:12 2014 +0100
  75. 96c207a Merge pull request #71 from sandrine-bailleux:sb/fix-tsp-fvp-makefile by Andrew Thoelke · Fri May 16 12:27:33 2014 +0100
  76. 3086cc9 fvp: Use the right implem. of plat_report_exception() in BL3-2 by Sandrine Bailleux · Tue May 13 16:41:25 2014 +0100
  77. 74a62b3 fvp: Provide per-EL MMU setup functions by Sandrine Bailleux · Fri May 09 11:35:36 2014 +0100
  78. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · Wed Apr 09 13:14:54 2014 +0100
  79. e2712bc Always use named structs in header files by Dan Handley · Thu Apr 10 15:37:22 2014 +0100
  80. 176e7b4 Remove vpath usage in makefiles by Dan Handley · Tue Apr 15 18:20:09 2014 +0100
  81. a70615f Move include and source files to logical locations by Dan Handley · Wed Apr 09 12:48:25 2014 +0100
  82. 65668f9 Allocate single stacks for BL1 and BL2 by Andrew Thoelke · Thu Mar 20 10:48:23 2014 +0000
  83. 38bde41 Place assembler functions in separate sections by Andrew Thoelke · Tue Mar 18 13:46:55 2014 +0000
  84. e01ea34 Use --gc-sections during link by Andrew Thoelke · Tue Mar 18 07:13:52 2014 +0000
  85. 4d05275 Separate out BL2, BL3-1 and BL3-2 early exception vectors from BL1 by Sandrine Bailleux · Mon Mar 24 10:24:08 2014 +0000
  86. a3a936e TSP: Make the platform-specific makefile mandatory by Sandrine Bailleux · Thu Mar 13 14:48:31 2014 +0000
  87. 2a30a75 Specify image entry in linker script by Jeenu Viswambharan · Tue Mar 11 11:06:45 2014 +0000
  88. ecf0a71 Generate build time and date message at link time. by Jon Medhurst · Mon Feb 17 12:18:24 2014 +0000
  89. b1eb093 fvp: Make use of the generic MMU translation table setup code by Jon Medhurst · Wed Feb 26 16:27:53 2014 +0000
  90. 407a95c Update Makefiles to get proper dependency checking working. by Jon Medhurst · Wed Feb 12 15:54:48 2014 +0000
  91. 916a2c1 Rework arithmetic operations in Test Secure Payload by Achin Gupta · Sun Feb 09 23:11:46 2014 +0000
  92. 607084e Add power management support in the SPD by Achin Gupta · Sun Feb 09 18:24:19 2014 +0000
  93. 375f538 Add Test Secure Payload Dispatcher (TSPD) service by Achin Gupta · Tue Feb 18 18:12:48 2014 +0000
  94. 7c88f3f Add Test Secure Payload (BL3-2) image by Achin Gupta · Tue Feb 18 18:09:12 2014 +0000