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git01.mediatek.com / filogic / atf / 7a53a91976da5375278add7a97f846647e5c1378 / lib / extensions
  1. 06ea44e refactor(trf): enable FEAT_TRF for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 17:30:43 2022 +0000
  2. c97c551 refactor(brbe): enable FEAT_BRBE for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 16:42:09 2022 +0000
  3. 191eff6 refactor(trbe): enable FEAT_TRBE for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 16:42:09 2022 +0000
  4. be028b4 fix(sme): add missing ISBs by Boyan Karatotev · Thu Oct 13 13:51:05 2022 +0100
  5. 6486997 feat(sve): support full SVE vector length by Mark Brown · Wed Apr 20 18:14:32 2022 +0100
  6. beaf5e8 feat(sme): fall back to SVE if SME is not there by Mark Brown · Mon May 09 13:26:36 2022 +0100
  7. a793ccc feat(trbe): add trbe under feature detection mechanism by Jayanth Dodderi Chidanand · Thu May 19 14:08:28 2022 +0100
  8. 6931675 feat(brbe): add brbe under feature detection mechanism by Jayanth Dodderi Chidanand · Mon May 09 12:33:03 2022 +0100
  9. 8a48954 Merge "fix(amu): limit virtual offset register access to NS world" into integration by Joanna Farley · Tue May 10 15:55:05 2022 +0200
  10. 8186596 feat(brbe): add BRBE support for NS world by johpow01 · Fri Jan 28 17:06:20 2022 -0600
  11. cc79927 fix(amu): limit virtual offset register access to NS world by John Powell · Tue Mar 29 00:25:59 2022 -0500
  12. 14dbc70 refactor(mpam): remove initialization of EL2 registers when EL2 is used by Zelalem Aweke · Wed Feb 02 15:29:13 2022 -0600
  13. 67fec3e feat(spe): add support for FEAT_SPEv1p2 by Manish V Badarkhe · Fri Dec 31 16:08:51 2021 +0000
  14. 9baade3 feat(sme): enable SME functionality by johpow01 · Thu Jul 08 14:14:00 2021 -0500
  15. e5dcf98 fix: libc: use long for 64-bit types on aarch64 by Scott Branden · Tue Aug 25 13:49:32 2020 -0700
  16. e9c3256 fix(amu): remove `amu_fconf.c` by Chris Kay · Mon Nov 01 11:11:45 2021 +0000
  17. 03be39d feat(mpmm): add support for MPMM by Chris Kay · Wed May 05 13:38:30 2021 +0100
  18. f11909f feat(amu): enable per-core AMU auxiliary counters by Chris Kay · Thu Aug 19 11:21:52 2021 +0100
  19. 26a7961 refactor(amu): refactor enablement and context switching by Chris Kay · Mon May 24 20:35:26 2021 +0100
  20. da81914 refactor(amu): detect auxiliary counters at runtime by Chris Kay · Tue May 25 15:24:18 2021 +0100
  21. a40141d refactor(amu): detect architected counters at runtime by Chris Kay · Tue May 25 12:33:18 2021 +0100
  22. 925fda4 refactor(amu): conditionally compile auxiliary counter support by Chris Kay · Tue May 25 10:42:56 2021 +0100
  23. a5fde28 refactor(amu): factor out register accesses by Chris Kay · Wed May 26 11:58:23 2021 +0100
  24. f13c6b5 refactor(amu)!: privatize unused AMU APIs by Chris Kay · Mon May 24 21:00:07 2021 +0100
  25. 1000ea8 build(amu): introduce `amu.mk` by Chris Kay · Wed May 19 19:24:37 2021 +0100
  26. 51a9711 feat(trf): enable trace filter control register access from lower NS EL by Manish V Badarkhe · Thu Jul 08 09:33:18 2021 +0100
  27. f356f7e feat(sys_reg_trace): enable trace system registers access from lower NS ELs by Manish V Badarkhe · Tue Jun 29 11:44:20 2021 +0100
  28. 20df29c feat(trbe): enable access to trace buffer control registers from lower NS EL by Manish V Badarkhe · Fri Jul 02 09:10:56 2021 +0100
  29. cac7d16 fix(el3_runtime): fix SVE and AMU extension enablement flags by Arunachalam Ganapathy · Thu Jul 08 09:35:57 2021 +0100
  30. c450277 feat(sve): enable SVE for the secure world by Max Shvetsov · Mon Mar 22 11:59:37 2021 +0000
  31. ce59bd2 Merge "lib/extensions/ras: fix bug of binary search" into integration by Manish Pandey · Tue Mar 02 15:00:08 2021 +0100
  32. fa59c6f Enable v8.6 AMU enhancements (FEAT_AMUv1p1) by johpow01 · Fri Oct 02 13:41:11 2020 -0500
  33. bdbf627 lib/extensions/ras: fix bug of binary search by Heyi Guo · Wed Apr 22 20:00:00 2020 +0800
  34. f3a4c54 Add support for FEAT_MTPMU for Armv8.6 by Javier Almansa Sobrino · Mon Nov 23 18:38:15 2020 +0000
  35. 7828f22 SPE: Fix feature detection by Andre Przywara · Fri Sep 11 09:18:09 2020 +0100
  36. a9c4521 TF-A AMU: remove AMU enable info print by Olivier Deprez · Thu Aug 13 12:55:54 2020 +0200
  37. 7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · Tue Jul 14 08:17:56 2020 +0100
  38. 70f6597 Tegra194: add RAS exception handling by David Pu · Mon Mar 18 15:14:49 2019 -0700
  39. 1993355 TF-A: Fix wrong register read for MPAM extension by Alexei Fedorov · Tue May 26 13:16:41 2020 +0100
  40. 3dd9f2b TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U by Alexei Fedorov · Tue Oct 01 13:58:23 2019 +0100
  41. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · Fri Sep 13 14:11:59 2019 +0100
  42. 72065ec Fix Coverity #342970, Uninitialized scalar variable by Justin Chadwell · Tue Jul 23 09:45:18 2019 +0100
  43. 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · Fri May 24 12:17:09 2019 +0100
  44. bdfa103 MPAM: enable MPAM EL2 traps by Louis Mayencourt · Mon Feb 11 11:25:50 2019 +0000
  45. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  46. 033b4bb Fix MISRA defects in extension libs by Antonio Nino Diaz · Thu Oct 25 16:52:26 2018 +0100
  47. 5753e49 Mark BL31 initialization functions by Daniel Boulby · Thu Sep 20 14:12:46 2018 +0100
  48. 067a357 RAS: Fix assert condition by Jeenu Viswambharan · Fri Sep 07 16:30:58 2018 +0100
  49. 69ac42b Merge pull request #1532 from jeenu-arm/misra-fixes by Dimitris Papastamos · Wed Aug 22 10:25:41 2018 +0100
  50. 31ac01e RAS: MISRA fixes by Jeenu Viswambharan · Thu Aug 02 10:14:12 2018 +0100
  51. 2da918c AArch64: Enable MPAM for lower ELs by Jeenu Viswambharan · Tue Jul 31 16:13:33 2018 +0100
  52. d51f80f RAS: ras_common: Add null pointer check for error record probe function by Sughosh Ganu · Sat May 12 11:02:31 2018 +0530
  53. d86cc5b RAS: Allow individual interrupt registration by Jeenu Viswambharan · Tue Dec 12 10:34:58 2017 +0000
  54. 2e2e881 RAS: Add support for node registration by Jeenu Viswambharan · Fri Dec 08 15:38:21 2017 +0000
  55. 19f6cf2 RAS: Add helpers to access Standard Error Records by Jeenu Viswambharan · Thu Dec 07 08:43:05 2017 +0000
  56. b8d8145 Merge pull request #1282 from robertovargas-arm/misra-changes by davidcunado-arm · Wed Feb 28 18:53:30 2018 +0000
  57. 0571270 Fix MISRA rule 8.4 in common code by Roberto Vargas · Mon Feb 12 12:36:17 2018 +0000
  58. aaa1985 MISRA fixes for AMU/SPE and SVE by Dimitris Papastamos · Mon Feb 26 17:56:31 2018 +0000
  59. e0848e9 aarch32: Fix multiple bugs in amu_helpers.S by Dimitris Papastamos · Tue Feb 20 12:25:36 2018 +0000
  60. 430f115 Assert that group0/group1 counter config is what we expect by Dimitris Papastamos · Tue Feb 20 11:16:44 2018 +0000
  61. 5e8cd79 Implement {spe,sve}_supported() helpers and refactor code by Dimitris Papastamos · Mon Feb 19 14:52:19 2018 +0000
  62. 0dcdd8d AMU: Implement context save/restore for aarch32 by Joel Hutton · Thu Dec 21 15:21:20 2017 +0000
  63. 2691bc6 AMU: Add assembler helper functions for aarch32 by Joel Hutton · Tue Dec 12 15:47:55 2017 +0000
  64. 7c4a6e6 AMU: Remove unnecessary WARN() by Dimitris Papastamos · Mon Jan 15 14:52:57 2018 +0000
  65. eaf3e6d AMU: Add hooks to save/restore AMU context by Dimitris Papastamos · Tue Nov 28 13:47:06 2017 +0000
  66. 525c37a AMU: Add configuration helpers for aarch64 by Dimitris Papastamos · Mon Nov 13 09:49:45 2017 +0000
  67. 60346db AMU: Add plat interface to select which group 1 counters to enable by Dimitris Papastamos · Wed Dec 13 10:54:37 2017 +0000
  68. ce88eee Enable SVE for Non-secure world by David Cunado · Fri Oct 20 11:30:57 2017 +0100
  69. dda48b0 AMU: Implement support for aarch32 by Dimitris Papastamos · Tue Oct 17 14:03:14 2017 +0100
  70. e08005a AMU: Implement support for aarch64 by Dimitris Papastamos · Thu Oct 12 13:02:29 2017 +0100
  71. 5bdbb47 Refactor Statistical Profiling Extensions implementation by Dimitris Papastamos · Fri Oct 13 12:06:06 2017 +0100