| commit | be028b4b60207c93ebf9493962cba727d76f1ec9 | [log] [tgz] |
|---|---|---|
| author | Boyan Karatotev <boyan.karatotev@arm.com> | Thu Oct 13 13:51:05 2022 +0100 |
| committer | Boyan Karatotev <boyan.karatotev@arm.com> | Thu Oct 13 13:51:05 2022 +0100 |
| tree | 360ae461d8847cd4c54244f0212380f53ad4cecc | |
| parent | 82801654d713bffa95f3653f26036062e6225985 [diff] |
fix(sme): add missing ISBs EL3 is configured to trap accesses to SME registers (via CPTR_EL3.ESM=0). To allow SME instructions, this needs to be temporarily disabled before changing system registers. If the PE delays the effects of writes to system registers then accessing the SME registers will trap without an isb. This patch adds the isb to restore functionality. Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com> Change-Id: I8ee5ecaec978dde2525631daa682a182ad8f7f04