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bl32
5707948
Merge pull request #1473 from robertovargas-arm/misra
by Dimitris Papastamos
· Wed Jul 11 13:15:52 2018 +0100
95f30ab
Add end_vector_entry assembler macro
by Roberto Vargas
· Tue Apr 17 11:31:43 2018 +0100
1d04c63
Add .extab and .exidx sections
by Roberto Vargas
· Thu May 10 11:01:16 2018 +0100
d93fde3
Use ALIGN instead of NEXT in linker scripts
by Roberto Vargas
· Wed Apr 11 11:53:31 2018 +0100
4d59eb4
Fix MISRA rule 8.4
by Roberto Vargas
· Mon Feb 12 12:36:17 2018 +0000
0859d2c
TSP: Enable cache along with MMU
by Jeenu Viswambharan
· Fri Apr 27 16:28:12 2018 +0100
e834ee1
DynamIQ: Enable MMU without using stack
by Jeenu Viswambharan
· Fri Apr 27 15:17:03 2018 +0100
570c06a
Rename symbols and files relating to CVE-2017-5715
by Dimitris Papastamos
· Fri Apr 06 15:29:34 2018 +0100
e93a0f4
types: use int-ll64 for both aarch32 and aarch64
by Masahiro Yamada
· Fri Feb 02 15:09:36 2018 +0900
d4b35e1
Fix MISRA rule 8.4 Part 3
by Roberto Vargas
· Mon Feb 12 12:36:17 2018 +0000
69abcd4
Fix MISRA rule 8.3 Part 3
by Roberto Vargas
· Mon Feb 12 12:36:17 2018 +0000
3c817f4
Rename 'smcc' to 'smccc'
by Antonio Nino Diaz
· Wed Mar 21 10:49:27 2018 +0000
6d07e67
Remove sp_min functions from plat_common.c
by Soby Mathew
· Thu Mar 01 10:53:33 2018 +0000
9c274f8
Merge pull request #1286 from antonio-nino-diaz-arm/an/mmu-mismatch
by davidcunado-arm
· Wed Feb 28 01:26:21 2018 +0000
7c2a3ca
Add comments about mismatched TCR_ELx and xlat tables
by Antonio Nino Diaz
· Fri Feb 23 15:07:54 2018 +0000
73308d0
Introduce the new BL handover interface
by Soby Mathew
· Tue Jan 09 14:36:14 2018 +0000
7814a95
Merge pull request #1173 from etienne-lms/armv7-qemu
by davidcunado-arm
· Wed Feb 07 11:57:19 2018 +0800
dc8bbb4
aarch32: optee: define the OP-TEE secure payload
by Etienne Carriere
· Mon Feb 05 10:42:42 2018 +0100
2691bc6
AMU: Add assembler helper functions for aarch32
by Joel Hutton
· Tue Dec 12 15:47:55 2017 +0000
0a4cded
sp_min: Implement workaround for CVE-2017-5715
by Dimitris Papastamos
· Tue Jan 02 11:37:02 2018 +0000
79d4e02
Merge pull request #1174 from antonio-nino-diaz-arm/an/page-size
by davidcunado-arm
· Fri Dec 08 16:29:19 2017 +0000
bf16923
ARM platforms: Fixup AArch32 builds
by Soby Mathew
· Tue Nov 14 14:10:10 2017 +0000
2ce2b09
Replace magic numbers in linkerscripts by PAGE_SIZE
by Antonio Nino Diaz
· Wed Nov 15 11:45:35 2017 +0000
dda48b0
AMU: Implement support for aarch32
by Dimitris Papastamos
· Tue Oct 17 14:03:14 2017 +0100
7555ab7
ARMv7 requires the clear exclusive access at monitor entry
by Etienne Carriere
· Wed Nov 08 13:49:12 2017 +0100
e3f2200
BL31: Introduce Publish and Subscribe framework
by Jeenu Viswambharan
· Fri Sep 22 08:32:10 2017 +0100
4168f2f
Init and save / restore of PMCR_EL0 / PMCR
by David Cunado
· Mon Oct 02 17:41:39 2017 +0100
a31bcde
Set NS version SCTLR during warmboot path
by David Cunado
· Mon Sep 04 16:41:37 2017 +0100
e42bdb9
Merge pull request #1054 from jwerner-chromium/JW_crash_x30
by davidcunado-arm
· Tue Aug 22 18:25:55 2017 +0100
c3028a1
Merge pull request #1053 from jwerner-chromium/JW_func_align
by davidcunado-arm
· Tue Aug 22 17:44:11 2017 +0100
67ebde7
Fix x30 reporting for unhandled exceptions
by Julius Werner
· Thu Jul 27 14:59:34 2017 -0700
b4c75e9
Add new alignment parameter to func assembler macro
by Julius Werner
· Tue Aug 01 15:16:36 2017 -0700
dc0fea7
bl32: add secure interrupt handling in AArch32 sp_min
by Etienne Carriere
· Wed Aug 09 15:48:53 2017 +0200
09bb548
Merge pull request #978 from etienne-lms/minor-build
by danh-arm
· Wed Jun 28 13:46:19 2017 +0100
41263a1
Merge pull request #995 from davidcunado-arm/dc/init_reg
by davidcunado-arm
· Fri Jun 23 08:39:19 2017 +0100
bfe12d3
bl: security_state should be of type unsigned int
by Etienne Carriere
· Wed Jun 07 16:45:42 2017 +0200
fee8653
Fully initialise essential control registers
by David Cunado
· Thu Apr 13 22:38:29 2017 +0100
9fb7912
sp_min: Flush console at end of main()
by Dimitris Papastamos
· Wed Jun 07 12:22:01 2017 +0100
52323b0
sp_min: Implement `sp_min_plat_runtime_setup()`
by Dimitris Papastamos
· Wed Jun 07 13:45:41 2017 +0100
f3e3a43
AArch32: Rework SMC context save and restore mechanism
by Soby Mathew
· Thu Mar 30 14:42:54 2017 +0100
f251a4c
Merge pull request #925 from dp-arm/dp/spdx
by davidcunado-arm
· Thu May 04 16:35:19 2017 +0100
fa3cf0b
Use SPDX license identifiers
by dp-arm
· Wed May 03 09:38:09 2017 +0100
28f69ab
Update terminology: standard SMC to yielding SMC
by David Cunado
· Wed Apr 05 11:34:03 2017 +0100
043fe9c
PSCI: Build option to enable D-Caches early in warmboot
by Soby Mathew
· Mon Apr 10 22:35:42 2017 +0100
306593d
Add support for GCC stack protection
by Douglas Raillard
· Fri Feb 24 18:14:15 2017 +0000
1fecc8d
Merge pull request #860 from jeenu-arm/hw-asstd-coh
by davidcunado-arm
· Fri Mar 17 12:34:37 2017 +0000
4ef91f1
Simplify translation tables headers dependencies
by Antonio Nino Diaz
· Mon Feb 20 14:22:22 2017 +0000
4614496
Enable data caches early with hardware-assisted coherency
by Jeenu Viswambharan
· Thu Jan 05 10:37:21 2017 +0000
a8954fc
Replace some memset call by zeromem
by Douglas Raillard
· Thu Jan 26 15:54:44 2017 +0000
21362a9
Introduce unified API to zero memory
by Douglas Raillard
· Fri Dec 02 13:51:54 2016 +0000
f212965
Abort preempted TSP STD SMC after PSCI CPU suspend
by Douglas Raillard
· Thu Nov 24 15:43:19 2016 +0000
b54c1a5
Merge pull request #775 from soby-mathew/sm/AArch32_stack_align
by danh-arm
· Wed Dec 14 09:25:15 2016 +0000
adb7027
AArch32: Fix the stack alignment issue
by Soby Mathew
· Tue Dec 06 12:10:51 2016 +0000
68aef10
Define and use no_ret macro where no return is expected
by Jeenu Viswambharan
· Wed Nov 30 15:21:11 2016 +0000
8da8966
PSCI: Do psci_setup() as part of std_svc_setup()
by Soby Mathew
· Mon Sep 19 17:21:15 2016 +0100
89256b8
PSCI: Introduce PSCI Library argument structure
by Soby Mathew
· Tue Sep 13 14:19:08 2016 +0100
1c16a4c
AArch32: Support in SP_MIN to receive arguments from BL2
by Yatharth Kochar
· Thu Jun 30 14:50:58 2016 +0100
06460cd
AArch32: Refactor SP_MIN to support RESET_TO_SP_MIN
by Yatharth Kochar
· Thu Jun 30 15:02:31 2016 +0100
ec8ac1c
AArch32: add a minimal secure payload (SP_MIN)
by Soby Mathew
· Thu May 05 14:32:05 2016 +0100
7b5c9b3
Move spinlock library code to AArch64 folder
by Soby Mathew
· Mon Aug 08 12:42:53 2016 +0100
bdba5e5
TSP: Print BL32_BASE rather than __RO_START__
by Sandrine Bailleux
· Thu Jun 16 14:24:26 2016 +0100
f91f144
Introduce SEPARATE_CODE_AND_RODATA build flag
by Sandrine Bailleux
· Fri Jul 08 14:37:40 2016 +0100
9e6ad6c
Introduce some helper macros for exception vectors
by Sandrine Bailleux
· Tue May 24 16:56:03 2016 +0100
f269714
Make:Remove calls to shell from makefiles.
by Evan Lloyd
· Wed Dec 02 18:17:37 2015 +0000
1f21bcf
Remove all non-configurable dead loops
by Antonio Nino Diaz
· Mon Feb 01 13:57:25 2016 +0000
7d19941
Remove dashes from image names: 'BL3-x' --> 'BL3x'
by Juan Castillo
· Mon Dec 14 09:35:25 2015 +0000
7866424
TSP: Allow preemption of synchronous S-EL1 interrupt handling
by Soby Mathew
· Fri Nov 13 02:08:43 2015 +0000
bec9851
Enable use of FIQs and IRQs as TSP interrupts
by Soby Mathew
· Thu Sep 03 18:29:38 2015 +0100
bc91282
Unify interrupt return paths from TSP into the TSPD
by Soby Mathew
· Tue Sep 22 12:01:18 2015 +0100
e9c4a64
Make generic code work in presence of system caches
by Achin Gupta
· Fri Sep 11 16:03:13 2015 +0100
9a0ff9b
Pass the target suspend level to SPD suspend hooks
by Achin Gupta
· Mon Sep 07 20:43:27 2015 +0100
da43b66
PSCI: Migrate SPDs and TSP to the new platform and framework API
by Soby Mathew
· Wed Jul 08 21:45:46 2015 +0100
f05c1b5
Add linker symbol declarations to bl_common.h
by Dan Handley
· Mon Apr 27 11:49:22 2015 +0100
81be100
Allow deeper platform port directory structure
by Dan Handley
· Fri Mar 27 17:44:35 2015 +0000
eb839ce
Fix type mismatches in verbose logging
by Dan Handley
· Mon Mar 23 18:13:33 2015 +0000
a877c25
Add support to indicate size and end of assembly functions
by Kévin Petit
· Tue Mar 24 14:03:57 2015 +0000
8723adf
Enable type-checking of arguments passed to printf() et al.
by Sandrine Bailleux
· Thu Feb 05 15:42:31 2015 +0000
f512157
Save 'power_state' early in PSCI CPU_SUSPEND call
by Soby Mathew
· Tue Sep 30 11:19:51 2014 +0100
2ae2043
Remove coherent memory from the BL memory maps
by Soby Mathew
· Thu Jan 08 18:02:44 2015 +0000
1fe4336
Juno: Add support for Test Secure-EL1 Payload
by Sandrine Bailleux
· Thu Jul 17 09:56:29 2014 +0100
4dc4a47
Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs
by Juan Castillo
· Tue Aug 12 11:17:06 2014 +0100
9e46188
Merge pull request #189 from achingupta/ag/tf-issues#153
by Dan Handley
· Tue Aug 19 11:04:21 2014 +0100
4fd2f5c
Clarify platform porting interface to TSP
by Dan Handley
· Mon Aug 04 11:41:20 2014 +0100
ed1744e
Unmask SError interrupt and clear SCR_EL3.EA bit
by Achin Gupta
· Mon Aug 04 23:13:10 2014 +0100
e2c27f5
Move TSP private declarations into separate header
by Dan Handley
· Fri Aug 01 17:58:27 2014 +0100
91b624e
Rationalize console log output
by Dan Handley
· Tue Jul 29 17:14:00 2014 +0100
534ae7f
Merge pull request #179 from jcastillo-arm/jc/tf-issues/219
by danh-arm
· Mon Aug 04 10:34:18 2014 +0100
4e81341
Support asynchronous method for BL3-2 initialization
by Vikram Kanigiri
· Tue Jul 15 16:49:22 2014 +0100
b3dbeb0
Call platform_is_primary_cpu() only from reset handler
by Juan Castillo
· Wed Jul 16 15:53:43 2014 +0100
3299181
Merge pull request #170 from achingupta/ag/tf-issues#226
by danh-arm
· Mon Jul 28 14:27:25 2014 +0100
289162c
Merge pull request #169 from achingupta/ag/tf-issues#198
by danh-arm
· Mon Jul 28 14:24:52 2014 +0100
9f09835
Simplify management of SCTLR_EL3 and SCTLR_EL1
by Achin Gupta
· Fri Jul 18 18:38:28 2014 +0100
04be3a5
Add support for printing version at runtime
by Juan Castillo
· Mon Jun 30 11:41:46 2014 +0100
afe7e2f
Implement a leaner printf for Trusted Firmware
by Soby Mathew
· Thu Jun 12 17:23:58 2014 +0100
e1aa516
Remove coherent stack usage from the warm boot path
by Achin Gupta
· Thu Jun 26 09:58:52 2014 +0100
f4a9709
Remove coherent stack usage from the cold boot path
by Achin Gupta
· Wed Jun 25 19:26:22 2014 +0100
3c449d7
Merge pull request #163 from sandrine-bailleux/sb/tf-issue-117-v2
by danh-arm
· Fri Jul 11 11:19:27 2014 +0100
e2e0c65
fvp: Reuse BL1 and BL2 memory through image overlaying
by Sandrine Bailleux
· Mon Jun 16 16:12:27 2014 +0100
fb42b12
Refactor fvp gic code to be a generic driver
by Dan Handley
· Fri Jun 20 09:43:15 2014 +0100
2d55240
Remove all checkpatch errors from codebase
by Juan Castillo
· Fri Jun 13 17:05:10 2014 +0100
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