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git01.mediatek.com / filogic / atf / 6521c1dfc20296d90fa8a3ed472df9b14bda6315 / bl32 / tsp / aarch64
  1. 6b4ec24 feat(tsp): add FF-A support to the TSP by Achin Gupta · Mon Oct 04 20:13:36 2021 +0100
  2. b0d69e8 fix(pie): invalidate data cache in the entire image range if PIE is enabled by Zelalem Aweke · Fri Oct 15 17:25:52 2021 -0500
  3. e57bce8 Avoid the use of linker *_SIZE__ macros by Yann Gautier · Tue Aug 18 14:42:41 2020 +0200
  4. 7d616ee TSP: Fix GCC 11.0.0 compilation error. by Alexei Fedorov · Fri Nov 13 12:36:49 2020 +0000
  5. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · Tue Aug 04 16:18:52 2020 -0500
  6. de634f8 TSP: add PIE support by Masahiro Yamada · Fri Jan 17 13:45:14 2020 +0900
  7. 0f7e601 Prevent speculative execution past ERET by Anthony Steinhauser · Tue Jan 07 15:44:06 2020 -0800
  8. f41355c Refactor ARMv8.3 Pointer Authentication support code by Alexei Fedorov · Fri Sep 13 14:11:59 2019 +0100
  9. 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · Fri May 24 12:17:09 2019 +0100
  10. d5a5960 Apply stricter speculative load restriction by John Tsichritzis · Mon Mar 04 16:42:54 2019 +0000
  11. e61ece0 TSP: Enable pointer authentication support by Antonio Nino Diaz · Tue Feb 26 11:41:03 2019 +0000
  12. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  13. 95f30ab Add end_vector_entry assembler macro by Roberto Vargas · Tue Apr 17 11:31:43 2018 +0100
  14. 0859d2c TSP: Enable cache along with MMU by Jeenu Viswambharan · Fri Apr 27 16:28:12 2018 +0100
  15. e42bdb9 Merge pull request #1054 from jwerner-chromium/JW_crash_x30 by davidcunado-arm · Tue Aug 22 18:25:55 2017 +0100
  16. 67ebde7 Fix x30 reporting for unhandled exceptions by Julius Werner · Thu Jul 27 14:59:34 2017 -0700
  17. b4c75e9 Add new alignment parameter to func assembler macro by Julius Werner · Tue Aug 01 15:16:36 2017 -0700
  18. f251a4c Merge pull request #925 from dp-arm/dp/spdx by davidcunado-arm · Thu May 04 16:35:19 2017 +0100
  19. fa3cf0b Use SPDX license identifiers by dp-arm · Wed May 03 09:38:09 2017 +0100
  20. 28f69ab Update terminology: standard SMC to yielding SMC by David Cunado · Wed Apr 05 11:34:03 2017 +0100
  21. 306593d Add support for GCC stack protection by Douglas Raillard · Fri Feb 24 18:14:15 2017 +0000
  22. 4ef91f1 Simplify translation tables headers dependencies by Antonio Nino Diaz · Mon Feb 20 14:22:22 2017 +0000
  23. 21362a9 Introduce unified API to zero memory by Douglas Raillard · Fri Dec 02 13:51:54 2016 +0000
  24. f212965 Abort preempted TSP STD SMC after PSCI CPU suspend by Douglas Raillard · Thu Nov 24 15:43:19 2016 +0000
  25. 68aef10 Define and use no_ret macro where no return is expected by Jeenu Viswambharan · Wed Nov 30 15:21:11 2016 +0000
  26. 9e6ad6c Introduce some helper macros for exception vectors by Sandrine Bailleux · Tue May 24 16:56:03 2016 +0100
  27. 1f21bcf Remove all non-configurable dead loops by Antonio Nino Diaz · Mon Feb 01 13:57:25 2016 +0000
  28. 7866424 TSP: Allow preemption of synchronous S-EL1 interrupt handling by Soby Mathew · Fri Nov 13 02:08:43 2015 +0000
  29. bec9851 Enable use of FIQs and IRQs as TSP interrupts by Soby Mathew · Thu Sep 03 18:29:38 2015 +0100
  30. bc91282 Unify interrupt return paths from TSP into the TSPD by Soby Mathew · Tue Sep 22 12:01:18 2015 +0100
  31. e9c4a64 Make generic code work in presence of system caches by Achin Gupta · Fri Sep 11 16:03:13 2015 +0100
  32. da43b66 PSCI: Migrate SPDs and TSP to the new platform and framework API by Soby Mathew · Wed Jul 08 21:45:46 2015 +0100
  33. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
  34. 2ae2043 Remove coherent memory from the BL memory maps by Soby Mathew · Thu Jan 08 18:02:44 2015 +0000
  35. 4dc4a47 Add support for PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · Tue Aug 12 11:17:06 2014 +0100
  36. 9e46188 Merge pull request #189 from achingupta/ag/tf-issues#153 by Dan Handley · Tue Aug 19 11:04:21 2014 +0100
  37. 4fd2f5c Clarify platform porting interface to TSP by Dan Handley · Mon Aug 04 11:41:20 2014 +0100
  38. ed1744e Unmask SError interrupt and clear SCR_EL3.EA bit by Achin Gupta · Mon Aug 04 23:13:10 2014 +0100
  39. e2c27f5 Move TSP private declarations into separate header by Dan Handley · Fri Aug 01 17:58:27 2014 +0100
  40. b3dbeb0 Call platform_is_primary_cpu() only from reset handler by Juan Castillo · Wed Jul 16 15:53:43 2014 +0100
  41. 9f09835 Simplify management of SCTLR_EL3 and SCTLR_EL1 by Achin Gupta · Fri Jul 18 18:38:28 2014 +0100
  42. e1aa516 Remove coherent stack usage from the warm boot path by Achin Gupta · Thu Jun 26 09:58:52 2014 +0100
  43. f4a9709 Remove coherent stack usage from the cold boot path by Achin Gupta · Wed Jun 25 19:26:22 2014 +0100
  44. b226a4d Add enable mmu platform porting interfaces by Dan Handley · Fri May 16 14:08:45 2014 +0100
  45. 891c4ca Use a vector table for TSP entrypoints by Andrew Thoelke · Tue May 20 21:43:27 2014 +0100
  46. 9f71f70 Non-Secure Interrupt support during Standard SMC processing in TSP by Soby Mathew · Fri May 09 20:49:17 2014 +0100
  47. a4f50c2 Add support for asynchronous FIQ handling in TSP by Achin Gupta · Fri May 09 12:17:56 2014 +0100
  48. 7671789 Add support for synchronous FIQ handling in TSP by Achin Gupta · Fri May 09 11:42:56 2014 +0100
  49. d8c9d26 Rework memory information passing to BL3-x images by Vikram Kanigiri · Fri May 16 18:48:12 2014 +0100
  50. 74a62b3 fvp: Provide per-EL MMU setup functions by Sandrine Bailleux · Fri May 09 11:35:36 2014 +0100
  51. 2bd4ef2 Reduce deep nesting of header files by Dan Handley · Wed Apr 09 13:14:54 2014 +0100
  52. 38bde41 Place assembler functions in separate sections by Andrew Thoelke · Tue Mar 18 13:46:55 2014 +0000
  53. 916a2c1 Rework arithmetic operations in Test Secure Payload by Achin Gupta · Sun Feb 09 23:11:46 2014 +0000
  54. 7c88f3f Add Test Secure Payload (BL3-2) image by Achin Gupta · Tue Feb 18 18:09:12 2014 +0000