1. 4c24bb7 Merge pull request #1168 from matt2048/master by davidcunado-arm · 7 years ago
  2. fcedb69 Implement support for the Activity Monitor Unit on Cortex A75 by Dimitris Papastamos · 7 years ago
  3. 41b0094 Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS by Matt Ma · 7 years ago
  4. 09d26a6 ARMv7: introduce Cortex-A12 by Etienne Carriere · 7 years ago
  5. 010dd1f ARMv7: introduce Cortex-A17 by Etienne Carriere · 7 years ago
  6. f2f7b91 ARMv7: introduce Cortex-A7 by Etienne Carriere · 7 years ago
  7. 37f8cdc ARMv7: introduce Cortex-A5 by Etienne Carriere · 7 years ago
  8. a1249e0 ARMv7: introduce Cortex-A9 by Etienne Carriere · 7 years ago
  9. 4ece755 ARMv7: introduce Cortex-A15 by Etienne Carriere · 7 years ago
  10. c3b4ca1 Cortex-A72: Implement workaround for erratum 859971 by Eleanor Bonnici · 7 years ago
  11. 0c9bd27 Cortex-A57: Implement workaround for erratum 859972 by Eleanor Bonnici · 7 years ago
  12. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  13. 9930501 Fix order of #includes by Isla Mitchell · 7 years ago
  14. d0c8273 Introduce TF_LDFLAGS by Douglas Raillard · 7 years ago
  15. 505f467 Merge pull request #1002 from douglas-raillard-arm/dr/fix_errata_a53 by danh-arm · 7 years ago
  16. 8a354f1 Resolve signed-unsigned comparison issues by David Cunado · 7 years ago
  17. d56fb04 Apply workarounds for A53 Cat A Errata 835769 and 843419 by Douglas Raillard · 7 years ago
  18. 2b40ca6 aarch32: Implement errata workarounds for Cortex A57 by Dimitris Papastamos · 7 years ago
  19. 9c47a5a aarch32: Implement errata workarounds for Cortex A53 by Dimitris Papastamos · 7 years ago
  20. 370542e aarch32: Implement cpu_rev_var_hs() by Dimitris Papastamos · 7 years ago
  21. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  22. 66231d1 Tegra: enable 'signed-comparison' compilation warning/errors by Varun Wadekar · 7 years ago
  23. 805c2c7 Add support for Cortex-A75 and Cortex-A55 CPUs by David Wang · 8 years ago
  24. 815faa8 Use a callee-saved register to be AAPCS-compliant by dp-arm · 7 years ago
  25. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  26. bf360df Merge pull request #910 from dp-arm/dp/AArch32-juno-port by davidcunado-arm · 7 years ago
  27. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · 8 years ago
  28. 7c65c1e Remove build option `ASM_ASSERTION` by Antonio Nino Diaz · 7 years ago
  29. 8cbdab2 Merge pull request #870 from douglas-raillard-arm/dr/remove_asm_signed_test by davidcunado-arm · 7 years ago
  30. 00eefd9 Add workaround for ARM Cortex-A53 erratum 855873 by Andre Przywara · 8 years ago
  31. 9d92e8c Replace ASM signed tests with unsigned by Douglas Raillard · 7 years ago
  32. c4364f6 Merge pull request #856 from antonio-nino-diaz-arm/an/dynamic-xlat by davidcunado-arm · 7 years ago
  33. 3f13c35 Apply workaround for errata 813419 of Cortex-A57 by Antonio Nino Diaz · 7 years ago
  34. 0a7e27c Merge pull request #853 from vwadekar/tegra-changes-from-downstream-v3 by davidcunado-arm · 7 years ago
  35. 8f87cc3 cpus: denver: remove barrier from denver_enable_dco() by Varun Wadekar · 8 years ago
  36. 1cc176b Merge pull request #848 from douglas-raillard-arm/dr/improve_errata_doc by danh-arm · 7 years ago
  37. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · 8 years ago
  38. c847f66 Clarify errata ERRATA_A53_836870 documentation by Douglas Raillard · 7 years ago
  39. 3c337a6 cpus: Add support for all Denver variants by Varun Wadekar · 9 years ago
  40. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 7 years ago
  41. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  42. 1f5f812 Correct system include order by David Cunado · 7 years ago
  43. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  44. adb7027 AArch32: Fix the stack alignment issue by Soby Mathew · 8 years ago
  45. a4c219a AArch32: Add support for ARM Cortex-A32 MPCore Processor by Yatharth Kochar · 8 years ago
  46. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · 8 years ago
  47. 748be1d AArch32: Add support in TF libraries by Soby Mathew · 8 years ago
  48. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · 8 years ago
  49. 63af687 Add support for ARM Cortex-A73 MPCore Processor by Yatharth Kochar · 8 years ago
  50. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · 8 years ago
  51. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · 8 years ago
  52. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · 8 years ago
  53. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · 8 years ago
  54. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · 8 years ago
  55. afa8a78 Fix wording in cpu-ops.mk comments by Sandrine Bailleux · 8 years ago
  56. 6b28c57 Make cpu operations warning a VERBOSE print by Soby Mathew · 8 years ago
  57. f12a31d Cortex-Axx: Unconditionally apply CPU reset operations by Sandrine Bailleux · 8 years ago
  58. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 8 years ago
  59. 432aa77 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · 8 years ago
  60. 4fceaca cortex_a53: Add A53 errata #826319, #836870 by developer · 9 years ago
  61. 28463b9 Add "Project Denver" CPU support by Varun Wadekar · 9 years ago
  62. e364a8a Fix recursive crash prints on FVP AEM model by Soby Mathew · 9 years ago
  63. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · 9 years ago
  64. 632432b Merge pull request #270 from vikramkanigiri/vk/a72_cpu_support by danh-arm · 9 years ago
  65. c47e011 Add support for ARM Cortex-A72 processor by Vikram Kanigiri · 9 years ago
  66. 9b38fc8 Initialise cpu ops after enabling data cache by Vikram Kanigiri · 9 years ago
  67. b5a6304 Fix the Cortex-A57 reset handler register usage by Soby Mathew · 9 years ago
  68. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  69. 7d861ea Invalidate the dcache after initializing cpu-ops by Soby Mathew · 10 years ago
  70. 937488b Optimize Cortex-A57 cluster power down sequence on Juno by Soby Mathew · 10 years ago
  71. 1604fa0 Optimize barrier usage during Cortex-A57 power down by Soby Mathew · 10 years ago
  72. c088433 Apply errata workarounds only when major/minor revisions match. by Soby Mathew · 10 years ago
  73. 42aa5eb Add support for level specific cache maintenance operations by Soby Mathew · 10 years ago
  74. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  75. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  76. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago
  77. f1785fd Add platform API for reset handling by Soby Mathew · 10 years ago
  78. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago