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git01.mediatek.com / filogic / atf / 574d68535b788ee455898b3c99cac00623942c92 / plat
  1. 85dbf5a PSCI: Add framework to handle composite power states by Soby Mathew · Tue Apr 07 12:16:56 2015 +0100
  2. b0082d2 PSCI: Introduce new platform and CM helper APIs by Soby Mathew · Thu Apr 09 13:40:55 2015 +0100
  3. d1b6150 Tegra: Introduce config for enabling NS access to L2/CPUECTRL regs by Varun Wadekar · Thu Jul 16 09:46:28 2015 +0530
  4. 6cab707 Tegra210: lock PMC registers holding CPU vector addresses by Varun Wadekar · Thu Jul 16 11:58:19 2015 +0530
  5. 30d8977 Tegra: PMC: lock SCRATCH22 register by Varun Wadekar · Thu Jul 16 10:38:11 2015 +0530
  6. fccf8e0 Tegra: PMC: check if a CPU is already online by Varun Wadekar · Thu Jul 16 10:35:12 2015 +0530
  7. 071b787 Tegra210: deassert CPU reset signals during power on by Varun Wadekar · Wed Jul 08 17:42:02 2015 +0530
  8. 85a90cf Tegra: Fix the delay loop used during SC7 exit by Varun Wadekar · Wed Jul 08 13:46:42 2015 +0530
  9. bc74fec Tegra: introduce delay timer support by Varun Wadekar · Thu Jul 16 15:47:03 2015 +0530
  10. 207cc73 Tegra: Exclude coherent memory region from memory map by Varun Wadekar · Wed Jul 08 12:57:50 2015 +0530
  11. 81b1383 Implement get_sys_suspend_power_state() handler for Tegra by Varun Wadekar · Fri Jul 03 16:31:28 2015 +0530
  12. 665b9ec TBB: delete deprecated plat_match_rotpk() by Juan Castillo · Fri Apr 10 12:43:27 2015 +0100
  13. a08a5e7 TBB: switch to the new authentication framework by Juan Castillo · Tue May 19 11:54:12 2015 +0100
  14. 9b265a8 TBB: add TBBR Chain of Trust by Juan Castillo · Thu May 07 14:52:44 2015 +0100
  15. 31a68f0 TBB: add platform API to read the ROTPK information by Juan Castillo · Tue Apr 14 12:49:03 2015 +0100
  16. 3a66aca Use numbers to identify images instead of names by Juan Castillo · Mon Apr 13 17:36:19 2015 +0100
  17. 7864145 Merge pull request #321 from vwadekar/tegra-gic-implementation-v1 by danh-arm · Wed Jun 24 11:41:24 2015 +0100
  18. 9ccbc03 Merge pull request #310 from sandrine-bailleux/sb/tf-issue-304-phase1 by danh-arm · Wed Jun 24 11:23:33 2015 +0100
  19. d3a4150 Add missing features to the Tegra GIC driver by Varun Wadekar · Tue Jun 16 11:23:00 2015 +0530
  20. 3898241 Merge pull request #320 from danh-arm/rh/timer-api-v10 by danh-arm · Thu Jun 18 16:55:47 2015 +0100
  21. f96fc8f FVP: Add SP804 delay timer by Ryan Harkin · Tue Mar 17 14:54:01 2015 +0000
  22. f9aae8b Merge pull request #319 from vwadekar/tegra-video-mem-aperture-v3 by danh-arm · Thu Jun 18 14:58:33 2015 +0100
  23. edd6643 Merge pull request #317 from vwadekar/run-bl32-on-tegra-v3 by Achin Gupta · Fri Jun 12 14:08:53 2015 +0100
  24. 7a269e2 Reserve a Video Memory aperture in DRAM memory by Varun Wadekar · Wed Jun 10 14:04:32 2015 +0530
  25. 52a1598 Boot Trusted OS' on Tegra SoCs by Varun Wadekar · Fri Jun 05 12:57:27 2015 +0530
  26. 7c6a91a Merge pull request #314 from sandrine-bailleux/sb/css-data-structs by danh-arm · Tue Jun 09 17:06:33 2015 +0100
  27. 47ea1bc CSS: Remove the constants MHU_SECURE_BASE/SIZE by Sandrine Bailleux · Tue Jun 09 11:53:33 2015 +0100
  28. 772631f Merge pull request #309 from soby-mathew/sm/fix_fvp_get_entry by danh-arm · Fri Jun 05 17:32:25 2015 +0100
  29. 81899f1 Remove FIRST_RESET_HANDLER_CALL build option by Sandrine Bailleux · Wed May 27 17:14:22 2015 +0100
  30. 2ae2319 FVP: Correct the PSYSR_WK bit width in platform_get_entrypoint by Soby Mathew · Thu Apr 30 12:27:41 2015 +0100
  31. 338e1c4 Merge pull request #307 from soby-mathew/sm/css_bit_width_fix by Achin Gupta · Tue Jun 02 11:18:18 2015 +0100
  32. 4f04935 Merge pull request #308 from vwadekar/tegra-soc-support-v4 by Achin Gupta · Tue Jun 02 11:06:01 2015 +0100
  33. da797f6 Always enable CCI coherency in BL3-1 by Sandrine Bailleux · Thu May 14 14:13:05 2015 +0100
  34. b316e24 Support for NVIDIA's Tegra T210 SoCs by Varun Wadekar · Tue May 19 16:48:04 2015 +0530
  35. 73003ac CSS: Extract primary cpu id using the correct bit width by Soby Mathew · Tue May 26 16:58:54 2015 +0100
  36. fd3f415 Fix return type of FVP plat_arm_topology_setup by Dan Handley · Wed May 06 14:47:40 2015 +0100
  37. 7da652d Detect SCP version incompatibility by Sandrine Bailleux · Mon Apr 13 11:47:48 2015 +0100
  38. 04b66d8 Move to the new ARM SCP Messaging Interfaces by Sandrine Bailleux · Wed Mar 18 14:52:53 2015 +0000
  39. 8e930fe Move Juno port to plat/arm/board/juno by Dan Handley · Mon Apr 27 19:34:53 2015 +0100
  40. 7bef800 Migrate Juno port to use common code by Dan Handley · Thu Mar 19 19:22:44 2015 +0000
  41. d617f66 Move FVP port to plat/arm/board/fvp by Dan Handley · Mon Apr 27 19:17:18 2015 +0100
  42. 2b6b574 Migrate FVP port to use common code by Dan Handley · Thu Mar 19 19:17:53 2015 +0000
  43. 9df4804 Add common ARM and CSS platform code by Dan Handley · Thu Mar 19 18:58:55 2015 +0000
  44. ea59668 Add header guards to asm macro files by Dan Handley · Wed Apr 01 17:34:24 2015 +0100
  45. 0cdebbd Remove use of PLATFORM_CACHE_LINE_SIZE by Dan Handley · Mon Mar 30 17:15:16 2015 +0100
  46. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · Tue Mar 24 14:03:57 2015 +0000
  47. fd8f898 Add support for Juno r1 in the platform reset handler by Sandrine Bailleux · Wed Feb 04 14:06:10 2015 +0000
  48. 356d59d Merge pull request #269 from vikramkanigiri/vk/common-cci by danh-arm · Tue Mar 17 14:28:48 2015 +0000
  49. 8bdd5b4 Merge pull request #266 from sandrine-bailleux/sb/juno-disable-errata-806969 by danh-arm · Tue Mar 17 14:20:29 2015 +0000
  50. 4e97e54 Use ARM CCI driver on FVP and Juno platforms by Vikram Kanigiri · Thu Feb 26 15:25:58 2015 +0000
  51. 725b133 Add macro to calculate number of elements in an array by Vikram Kanigiri · Wed Mar 04 10:34:27 2015 +0000
  52. 4deea9a Juno: Disable workaround for Cortex-A57 erratum #806969 by Sandrine Bailleux · Tue Feb 17 10:33:41 2015 +0000
  53. 8723adf Enable type-checking of arguments passed to printf() et al. by Sandrine Bailleux · Thu Feb 05 15:42:31 2015 +0000
  54. a64a854 Fix violations to the coding style by Sandrine Bailleux · Thu Mar 05 10:54:34 2015 +0000
  55. eb23f98 Merge pull request #259 from soby-mathew/sm/plat_max_afflvl by danh-arm · Wed Feb 25 09:54:41 2015 -0800
  56. 30275dc Merge pull request #258 from rmurphy-arm/rm/dma-smmu by danh-arm · Wed Feb 25 09:54:01 2015 -0800
  57. 0f1d666 Juno: clear DMA-330 SMMU security state by Robin Murphy · Fri Jan 09 14:30:58 2015 +0000
  58. 2b7de2b Export maximum affinity using PLATFORM_MAX_AFFLVL macro by Soby Mathew · Thu Feb 12 14:45:02 2015 +0000
  59. 13ee968 Minimize MAX_MMAP_REGIONS for each BL stage by Soby Mathew · Thu Jan 22 11:22:22 2015 +0000
  60. 9246ab8 TBB: authenticate BL3-x images and certificates by Juan Castillo · Wed Jan 28 16:46:57 2015 +0000
  61. 0d3cdbe FVP: initialize IO framework in bl2_early_platform_setup() by Juan Castillo · Wed Jan 28 16:42:41 2015 +0000
  62. d227d8b TBB: authenticate BL2 image and certificate by Juan Castillo · Wed Jan 07 13:49:59 2015 +0000
  63. 9c25a40 TBB: add PolarSSL based authentication module by Juan Castillo · Tue Jan 13 12:21:04 2015 +0000
  64. 5e29c75 TBB: add a platform specific function to validate the ROTPK by Juan Castillo · Wed Jan 07 10:39:25 2015 +0000
  65. 11abdcd TBB: add tool to generate certificates by Juan Castillo · Tue Oct 21 11:30:42 2014 +0100
  66. 09a16c0 Merge pull request #248 from jcastillo-arm/jc/tf-issues/212_1 by danh-arm · Wed Jan 28 10:42:32 2015 +0000
  67. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · Thu Nov 20 18:09:41 2014 +0000
  68. e33ee5f FVP: Allow BL3-2 to sit in the secure region of DRAM by Juan Castillo · Fri Dec 19 09:51:00 2014 +0000
  69. 74e52a7 Validate power_state and entrypoint when executing PSCI calls by Soby Mathew · Thu Oct 02 16:56:51 2014 +0100
  70. ffb4ab1 Remove `ns_entrypoint` and `mpidr` from parameters in pm_ops by Soby Mathew · Fri Sep 26 15:08:52 2014 +0100
  71. 2ae2043 Remove coherent memory from the BL memory maps by Soby Mathew · Thu Jan 08 18:02:44 2015 +0000
  72. 523d633 Move bakery algorithm implementation out of coherent memory by Soby Mathew · Thu Jan 08 18:02:19 2015 +0000
  73. f3e0218 FVP: map non-secure DRAM1 in the MMU by Juan Castillo · Fri Dec 19 09:28:30 2014 +0000
  74. 91965a5 Merge pull request #233 from jcastillo-arm/jc/tf-issues/254 by danh-arm · Fri Jan 16 17:55:45 2015 +0000
  75. 6ba59eb Juno: Add support for image overlaying in Trusted SRAM by Juan Castillo · Fri Nov 07 09:44:58 2014 +0000
  76. 23ff1c6 Remove IRQ_SEC_SGI_8 constant by Sandrine Bailleux · Wed Nov 19 13:48:59 2014 +0000
  77. 3901165 Merge pull request #220 from soby-mathew/sm/reassign_crash_console by danh-arm · Tue Nov 11 15:54:09 2014 +0000
  78. 64a76ed Use the BL3-1 runtime console as the crash console. by Soby Mathew · Tue Sep 23 11:32:48 2014 +0100
  79. 06e90c5 Merge pull request #219 from jcastillo-arm/jc/tf-issues/253 by danh-arm · Tue Nov 04 16:01:40 2014 +0000
  80. b3286c0 Juno: Use the generic ARM GIC driver by Juan Castillo · Mon Oct 20 12:29:58 2014 +0100
  81. 937488b Optimize Cortex-A57 cluster power down sequence on Juno by Soby Mathew · Mon Sep 22 14:13:34 2014 +0100
  82. de8daec Merge pull request #217 from jcastillo-arm/jc/tf-issues/257 by danh-arm · Tue Oct 28 12:25:51 2014 +0000
  83. 8d60e31 Merge pull request #216 from vikramkanigiri/vk/juno_standby_support by danh-arm · Tue Oct 28 12:06:47 2014 +0000
  84. 42a617d FVP: keep shared data in Trusted SRAM by Juan Castillo · Wed Sep 24 10:00:06 2014 +0100
  85. 58a185e Juno: Support entry into a standby state by Vikram Kanigiri · Tue Jul 01 15:34:11 2014 +0100
  86. 921b877 Juno: Reserve some DDR-DRAM for secure use by Juan Castillo · Fri Sep 05 17:29:38 2014 +0100
  87. 6b672f5 Juno: Use TZC-400 driver calls by Juan Castillo · Thu Sep 04 14:43:09 2014 +0100
  88. 00389ed Merge pull request #214 from soby-mathew/sm/bl_specific_mmap by achingupta · Thu Sep 25 14:28:59 2014 +0100
  89. b08bc04 Create BL stage specific translation tables by Soby Mathew · Wed Sep 03 17:48:44 2014 +0100
  90. 383c477 Remove BSS section access by 'plat_print_gic' during crash reporting by Soby Mathew · Mon Sep 01 12:29:27 2014 +0100
  91. 046cd3f Miscellaneous documentation fixes by Sandrine Bailleux · Wed Aug 06 11:27:23 2014 +0100
  92. f797cea Rationalize UART usage among different BL stages by Soby Mathew · Thu Aug 21 15:20:27 2014 +0100
  93. 21b0419 Juno: Read primary CPU MPID from SCC GPR_1 by Juan Castillo · Tue Aug 12 17:24:30 2014 +0100
  94. 75ed356 Juno: Implement PSCI SYSTEM_OFF and SYSTEM_RESET APIs by Juan Castillo · Tue Aug 12 08:42:28 2014 +0100
  95. 1fe4336 Juno: Add support for Test Secure-EL1 Payload by Sandrine Bailleux · Thu Jul 17 09:56:29 2014 +0100
  96. 89b70cd Juno: Implement PSCI CPU_OFF and CPU_SUSPEND APIs by Achin Gupta · Mon Aug 18 14:40:27 2014 +0100
  97. 798140d Juno: Implement initial platform port by Sandrine Bailleux · Thu Jul 17 16:06:39 2014 +0100
  98. 8e2f287 Add CPU specific power management operations by Soby Mathew · Thu Aug 14 12:49:05 2014 +0100
  99. f1785fd Add platform API for reset handling by Soby Mathew · Thu Aug 14 12:22:32 2014 +0100
  100. c704cbc Introduce framework for CPU specific operations by Soby Mathew · Thu Aug 14 11:33:56 2014 +0100