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filogic
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atf
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52de88d67c71b50d2d5ad3149230702a165ad789
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include
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arch
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aarch64
/
el3_common_macros.S
c450277
feat(sve): enable SVE for the secure world
by Max Shvetsov
· 3 years, 5 months ago
307f34b
fix(security): Set MDCR_EL3.MCCD bit
by Alexei Fedorov
· 3 years, 3 months ago
f3a4c54
Add support for FEAT_MTPMU for Armv8.6
by Javier Almansa Sobrino
· 3 years, 9 months ago
ed20207
Increase type widths to satisfy width requirements
by Jimmy Brisson
· 4 years ago
e07e808
runtime_exceptions: Update AT speculative workaround
by Manish V Badarkhe
· 4 years, 1 month ago
5dc9e9c
Fix compilation error when ENABLE_PIE=1
by Varun Wadekar
· 4 years, 3 months ago
31a14e1
bl31: Split into two separate memory regions
by Samuel Holland
· 6 years ago
c825768
PIE: make call to GDT relocation fixup generalized
by Manish Pandey
· 4 years, 9 months ago
add24a4
Explicitly disable the SPME bit in MDCR_EL3
by Petre-Ionut Tudor
· 4 years, 11 months ago
d2f21b8
Add missing support for BL2_AT_EL3 in XIP memory
by Lionel Debieve
· 5 years ago
461f8f4
Invalidate dcache build option for bl2 entry at EL3
by Hadi Asyrafi
· 5 years ago
503bbf3
AArch64: Disable Secure Cycle Counter
by Alexei Fedorov
· 5 years ago
594811b
Add ARMv8.3-PAuth registers to CPU context
by Antonio Nino Diaz
· 6 years ago
3fbd3f5
Disable processor Cycle Counting in Secure state
by Antonio Nino Diaz
· 5 years ago
8d1ade6
Reorganize architecture-dependent header files
by Antonio Nino Diaz
· 6 years ago
[Renamed from include/common/aarch64/el3_common_macros.S]
0f3a004
Merge pull request #1731 from miyatsu/doc-fix-20181225
by Antonio Niño Díaz
· 6 years ago