1. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  2. b83e42b CPU: Make shifted constants unsigned by Eleanor Bonnici · 7 years ago
  3. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · 7 years ago
  4. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  5. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  6. 69ce101 Tegra: enable ECC/Parity protection for Cortex-A57 CPUs by Varun Wadekar · 8 years ago
  7. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · 8 years ago
  8. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · 8 years ago
  9. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · 8 years ago
  10. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · 8 years ago
  11. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · 8 years ago
  12. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · 8 years ago
  13. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 8 years ago
  14. 3ce4e88 Add macros for retention control in Cortex-A53/A57 by Varun Wadekar · 9 years ago
  15. 798140d Juno: Implement initial platform port by Sandrine Bailleux · 10 years ago
  16. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  17. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  18. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago[Copied (65%) from include/lib/aarch64/cpu_macros.S]
  19. c704cbc Introduce framework for CPU specific operations by Soby Mathew · 10 years ago[Copied (63%) from lib/aarch64/cpu_helpers.S]
  20. c61399b Merge pull request #191 from danh-arm/jc/tf-issues/218 by danh-arm · 10 years ago