1. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  2. b83e42b CPU: Make shifted constants unsigned by Eleanor Bonnici · 7 years ago
  3. ac838c5 aarch32: Fix L2CTRL definition for Cortex A57 and A72 by Dimitris Papastamos · 7 years ago
  4. 9c47a5a aarch32: Implement errata workarounds for Cortex A53 by Dimitris Papastamos · 7 years ago
  5. c6a11f6 include: add U()/ULL() macros for constants by Varun Wadekar · 7 years ago
  6. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  7. 805c2c7 Add support for Cortex-A75 and Cortex-A55 CPUs by David Wang · 8 years ago
  8. 9326b90 Cortex-A53: add some bit definitions by Haojian Zhuang · 7 years ago
  9. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  10. 7d99b6c Merge branch 'integration' into tf_issue_461 by Scott Branden · 7 years ago
  11. bf404c0 Move defines in utils.h to utils_def.h to fix shared header compile issues by Scott Branden · 7 years ago
  12. a9f776c AArch32: Add support for ARM Cortex-A53/57/72 MPCore Processor by Yatharth Kochar · 8 years ago
  13. 00eefd9 Add workaround for ARM Cortex-A53 erratum 855873 by Andre Przywara · 8 years ago
  14. 69ce101 Tegra: enable ECC/Parity protection for Cortex-A57 CPUs by Varun Wadekar · 8 years ago
  15. d43583c cpus: denver: disable DCO operations from platform code by Varun Wadekar · 8 years ago
  16. 3c337a6 cpus: Add support for all Denver variants by Varun Wadekar · 9 years ago
  17. d5ec367 Report errata workaround status to console by Jeenu Viswambharan · 8 years ago
  18. 441bfdd Use #ifdef for IMAGE_BL* instead of #if by Masahiro Yamada · 8 years ago
  19. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  20. a4c219a AArch32: Add support for ARM Cortex-A32 MPCore Processor by Yatharth Kochar · 8 years ago
  21. f528faf AArch32: Common changes needed for BL1/BL2 by Yatharth Kochar · 8 years ago
  22. 748be1d AArch32: Add support in TF libraries by Soby Mathew · 8 years ago
  23. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · 8 years ago
  24. 63af687 Add support for ARM Cortex-A73 MPCore Processor by Yatharth Kochar · 8 years ago
  25. 143ef1a Add support for Cortex-A57 erratum 833471 workaround by Sandrine Bailleux · 8 years ago
  26. adcbd55 Add support for Cortex-A57 erratum 826977 workaround by Sandrine Bailleux · 8 years ago
  27. 48cbe85 Add support for Cortex-A57 erratum 829520 workaround by Sandrine Bailleux · 8 years ago
  28. c11116f Add support for Cortex-A57 erratum 828024 workaround by Sandrine Bailleux · 8 years ago
  29. a7e0c53 Add support for Cortex-A57 erratum 826974 workaround by Sandrine Bailleux · 8 years ago
  30. d481759 Disable non-temporal hint on Cortex-A53/57 by Sandrine Bailleux · 8 years ago
  31. 432aa77 Add support for ARM Cortex-A35 processor by Sandrine Bailleux · 8 years ago
  32. 7d19941 Remove dashes from image names: 'BL3-x' --> 'BL3x' by Juan Castillo · 9 years ago
  33. 29a7a03 Juno R2: Configure the correct L2 RAM latency values by Sandrine Bailleux · 9 years ago
  34. 3ce4e88 Add macros for retention control in Cortex-A53/A57 by Varun Wadekar · 9 years ago
  35. 4fceaca cortex_a53: Add A53 errata #826319, #836870 by developer · 9 years ago
  36. 28463b9 Add "Project Denver" CPU support by Varun Wadekar · 9 years ago
  37. ea59668 Add header guards to asm macro files by Dan Handley · 9 years ago
  38. c47e011 Add support for ARM Cortex-A72 processor by Vikram Kanigiri · 9 years ago
  39. 36433d1 Call reset handlers upon BL3-1 entry. by Yatharth Kochar · 10 years ago
  40. 798140d Juno: Implement initial platform port by Sandrine Bailleux · 10 years ago
  41. 802f865 Add support for selected Cortex-A57 errata workarounds by Soby Mathew · 10 years ago
  42. 38b4bc9 Add CPU specific crash reporting handlers by Soby Mathew · 10 years ago
  43. 8e2f287 Add CPU specific power management operations by Soby Mathew · 10 years ago