1. 4e7a63c Tegra194: mce: enable strict checking by Dilan Lee · Thu Aug 10 16:01:42 2017 +0800
  2. 0723bb6 Tegra194: CC6 state from last offline CPU in the cluster by Varun Wadekar · Mon Oct 16 15:57:17 2017 -0700
  3. 498d501 Tegra194: console driver compilation from platform makefiles by Varun Wadekar · Wed Nov 15 15:52:01 2017 -0800
  4. ee93ed1 Tegra194: memctrl: platform handler for TZDRAM setup by Steven Kao · Tue Nov 14 19:12:58 2017 +0800
  5. 0d42411 Tegra194: memctrl: override SE client as coherent by Puneet Saxena · Fri Sep 08 12:14:03 2017 +0530
  6. da865de Tegra194: save system suspend entry marker to TZDRAM by Varun Wadekar · Fri Nov 10 13:27:29 2017 -0800
  7. e0c222f Tegra194: helper functions for CPU rst handler and SMMU ctx offset by Varun Wadekar · Fri Nov 10 13:23:34 2017 -0800
  8. 362a6b2 Tegra194: cleanup references to Tegra186 by Varun Wadekar · Fri Nov 10 11:04:42 2017 -0800
  9. 093bfaa Tegra194: mce: display NVG header version during boot by Varun Wadekar · Tue Nov 07 08:50:55 2017 -0800
  10. 706b9fe Tegra194: mce: fix cg_cstate encoding format by Vignesh Radhakrishnan · Sat Nov 04 16:36:23 2017 -0700
  11. 530b217 Tegra194: drivers: SE and RNG1/PKA1 context save support by Steven Kao · Fri Jun 23 16:18:58 2017 +0800
  12. 4607f17 Tegra194: rename secure scratch register macros by Steven Kao · Mon Oct 23 18:35:14 2017 +0800
  13. acdf411 Tegra194: SiP: Fix Rule 8.4 and Rule 10.4 violation by Anthony Zhou · Wed Oct 25 18:17:08 2017 +0800
  14. 7aa6c03 Tegra194: mce: remove unsupported functionality by Varun Wadekar · Thu Oct 19 12:02:17 2017 -0700
  15. a4e0a81 Tegra194: sanity check target cluster during core power on by Varun Wadekar · Tue Oct 17 10:53:33 2017 -0700
  16. 8bf6d4e Tegra194: fix defects flagged by MISRA scan by Anthony Zhou · Wed Sep 20 17:44:43 2017 +0800
  17. c46150f Tegra194: mce: fix defects flagged by MISRA scan by Anthony Zhou · Wed Sep 20 17:18:56 2017 +0800
  18. 1719707 Tegra194: remove the GPU reset register macro by Steven Kao · Fri Oct 13 10:28:29 2017 +0800
  19. 4309d7b Tegra194: MC registers to allow CPU accesses to TZRAM by Varun Wadekar · Tue Oct 03 15:25:44 2017 -0700
  20. 58d1194 Tegra194: increase MAX_MMAP_REGIONS macro value by Steven Kao · Fri Sep 29 16:32:34 2017 +0800
  21. 6f373a2 Tegra194: update nvg header to v6.1 by Steven Kao · Fri Sep 29 18:09:17 2017 +0800
  22. 238d6d2 Tegra194: update cache operations supported by the ROC by Steven Kao · Wed Aug 16 20:12:00 2017 +0800
  23. 128f46a Tegra194: memctrl: platform handlers to reprogram MSS by Varun Wadekar · Thu Oct 24 16:06:12 2019 -0700
  24. a07d1c7 Tegra194: core and cluster count values by Varun Wadekar · Wed Aug 23 14:59:09 2017 -0700
  25. 86d3a2b Tegra194: correct the TEGRA_CAR_RESET_BASE macro value by Steven Kao · Thu Aug 31 13:35:01 2017 +0800
  26. 53fc032 Tegra194: add MC_SECURITY mask defines by Harvey Hsieh · Wed Aug 09 16:26:33 2017 +0800
  27. 74813f9 Tegra194: Update wake mask, wake time for cpu offlining by Krishna Sitaraman · Fri Jul 14 13:51:44 2017 -0700
  28. 8162109 Tegra194: program stream ids for XUSB by Ajay Gupta · Tue Aug 01 15:53:04 2017 -0700
  29. 09f6817 Tegra194: Update checks for c-state stats by Krishna Sitaraman · Wed May 24 17:21:22 2017 -0700
  30. fe9635b Tegra194: smmu: fix mask for board revision id by Pritesh Raithatha · Thu Aug 03 19:12:14 2017 +0530
  31. 7dfbca7 Tegra194: smmu: ISO support by Steven Kao · Tue Jul 25 12:44:32 2017 +0800
  32. 978887f Tegra194: Initialize smmu on system suspend exit by Vignesh Radhakrishnan · Tue Jul 11 15:16:08 2017 -0700
  33. 832ad79 Tegra194: Update cpu core-id calculation by Krishna Sitaraman · Fri Jun 30 13:51:12 2017 -0700
  34. 4035902 Tegra194: read-modify-write ACTLR_ELx registers by Steven Kao · Thu Jun 22 12:54:06 2017 +0800
  35. d7a5c25 Tegra194: Enable fake system suspend by Vignesh Radhakrishnan · Thu May 25 16:27:42 2017 -0700
  36. f8b4b49 Tegra194: convert 'target_cpu' and 'target_cluster' to 32-bits by Varun Wadekar · Thu Jun 22 10:35:38 2017 -0700
  37. 0075990 Tegra194: platform support for memctrl/smmu drivers by Varun Wadekar · Wed May 31 11:41:00 2017 -0700
  38. c64afeb Tegra194: Support for cpu suspend by Krishna Sitaraman · Mon Jan 23 16:15:44 2017 -0800
  39. ab5d485 Merge changes I5693ad56,I9ddc077a into integration by Soby Mathew · Mon Nov 25 12:54:21 2019 +0000
  40. 181aa84 mediatek: mt8183: Fix AARCH64 init fail on CPU0 by developer · Thu Oct 31 14:19:44 2019 +0800
  41. e2f1332 mediatek: mt8183: refine GIC driver for low power scenarios by developer · Fri Oct 04 10:47:11 2019 +0800
  42. b4cb7f0 Merge "mediatek: mt8183: switch PLL/CLKSQ/ck_off/axi_26m control to SPM" into integration by joanna.farley · Fri Nov 22 12:25:55 2019 +0000
  43. 469db44 Merge "Fix multithreaded FVP power domain tree" into integration by Alexei Fedorov · Wed Nov 20 10:42:47 2019 +0000
  44. f8900c4 Merge "Add multithreaded DynamIQ dts file" into integration by Alexei Fedorov · Wed Nov 20 10:42:37 2019 +0000
  45. 63527d7 Merge "GIC-600: Fix include ordering according to the coding style" into integration by Paul Beesley · Tue Nov 19 14:55:37 2019 +0000
  46. 0ac3941 GIC-600: Fix include ordering according to the coding style by Max Shvetsov · Tue Nov 19 11:01:26 2019 +0000
  47. cdd6393 Merge changes from topic "tegra-downstream-092319" into integration by Sandrine Bailleux · Tue Nov 19 08:05:08 2019 +0000
  48. 130f438 Merge changes from topic "lm/improve_memory_layout" into integration by Sandrine Bailleux · Mon Nov 18 16:45:03 2019 +0000
  49. bb2c538 DOC: Update ROMLIB page with memory impact info by Louis Mayencourt · Fri Oct 11 15:27:01 2019 +0100
  50. 438aa72 ROMLIB: Optimize memory layout when ROMLIB is used by Louis Mayencourt · Fri Oct 11 14:31:13 2019 +0100
  51. f2de0a3 Merge "Refactor load_auth_image_internal()." into integration by Alexei Fedorov · Mon Nov 18 10:06:53 2019 +0000
  52. 92d1c3d Merge "doc: Add missing terms to the glossary" into integration by Paul Beesley · Fri Nov 15 13:55:55 2019 +0000
  53. 27c671a Fix multithreaded FVP power domain tree by Imre Kis · Fri Nov 15 09:50:06 2019 +0000
  54. 6869ca3 Merge "GIC-600: Fix power up sequence" into integration by Sandrine Bailleux · Fri Nov 15 09:23:58 2019 +0000
  55. 88fba67 GIC-600: Fix power up sequence by Alexei Fedorov · Wed Jul 31 13:24:22 2019 +0100
  56. e5dce5d Merge "Coding guideline suggest not to use unsigned long" into integration by Sandrine Bailleux · Fri Nov 15 07:40:52 2019 +0000
  57. 2145bf4 doc: Add missing terms to the glossary by Paul Beesley · Thu Oct 17 13:19:02 2019 +0000
  58. 50ff5e2 Merge "TF-A: Fix non-standard frequency issue in udelay" into integration by Soby Mathew · Thu Nov 14 14:38:13 2019 +0000
  59. 72a7663 TF-A: Fix non-standard frequency issue in udelay by Max Shvetsov · Thu Oct 31 08:35:02 2019 +0000
  60. 2cce803 Refactor load_auth_image_internal(). by Sandrine Bailleux · Mon Oct 14 13:47:21 2019 +0200
  61. 88bcd5a Tegra194: remove L2 ECC parity protection setting by Harvey Hsieh · Wed Nov 23 19:15:02 2016 +0800
  62. 5c5f78c Tegra194: sip_calls: mark unused parameter as const by Varun Wadekar · Fri Apr 28 18:15:09 2017 -0700
  63. a7265be Tegra194: implement handler to retrieve power domain tree by Varun Wadekar · Fri Apr 28 08:45:53 2017 -0700
  64. 5e890b3 Tegra194: mce: fix function declaration conflicts by Anthony Zhou · Fri Apr 28 13:52:58 2017 +0800
  65. f2d5466 Tegra194: add macros to read GPU reset status by Varun Wadekar · Wed Apr 26 08:57:27 2017 -0700
  66. 0e2502f Tegra194: skip notifying MCE in fake system suspend by Vignesh Radhakrishnan · Mon Apr 10 15:07:39 2017 -0700
  67. 153ba22 Tegra194: Enable system suspend by Tejal Kudav · Tue Feb 14 18:02:04 2017 -0800
  68. d624e7e Merge "docs: Add Cortex-Hercules/HerculesAE CPU support" into integration by Sandrine Bailleux · Wed Nov 13 17:24:02 2019 +0000
  69. c697762 docs: Add Cortex-Hercules/HerculesAE CPU support by laurenw-arm · Wed Oct 23 15:39:31 2019 -0500
  70. 6bb7ddc Add multithreaded DynamIQ dts file by Imre Kis · Fri Oct 25 14:29:51 2019 +0200
  71. b6b7fd1 Merge changes from topic "tegra-downstream-092319" into integration by Sandrine Bailleux · Wed Nov 13 16:31:22 2019 +0000
  72. d091bf6 Merge "Fix white space errors + remove #if defined" into integration by Sandrine Bailleux · Wed Nov 13 16:22:52 2019 +0000
  73. eb2b2b6 Coding guideline suggest not to use unsigned long by Deepika Bhavnani · Tue Sep 03 21:06:17 2019 +0300
  74. a14d6a5 Merge "plat/arm: Re-enable PIE when RESET_TO_BL31=1" into integration by Paul Beesley · Tue Nov 12 17:00:13 2019 +0000
  75. a4c5386 Merge "TF-A Documentation: Update Security Advisory TFV-5 (CVE-2017-15031)" into integration by Paul Beesley · Tue Nov 12 13:21:42 2019 +0000
  76. 839a966 Merge "Disable stack protection explicitly" into integration by Paul Beesley · Tue Nov 12 13:20:46 2019 +0000
  77. 7d97bf7 Merge "n1sdp: setup multichip gic routing table" into integration by Paul Beesley · Tue Nov 12 11:50:53 2019 +0000
  78. 2f61842 Merge changes from topic "gic600_multichip" into integration by Paul Beesley · Tue Nov 12 10:55:10 2019 +0000
  79. 2c44a44 n1sdp: setup multichip gic routing table by Manish Pandey · Mon Oct 14 17:37:38 2019 +0100
  80. ad3fc76 gic/gic600: add support for multichip configuration by Vijayenthiran Subramaniam · Mon Sep 16 17:05:08 2019 +0530
  81. 2207e93 plat/arm: Re-enable PIE when RESET_TO_BL31=1 by Manish Pandey · Wed Nov 06 13:17:46 2019 +0000
  82. 28adb06 mediatek: mt8183: switch PLL/CLKSQ/ck_off/axi_26m control to SPM by developer · Mon Oct 28 21:11:48 2019 +0800
  83. 2dfa764 plat/arm/gicv3: add support for probing multiple GIC Redistributor frames by Vijayenthiran Subramaniam · Fri Oct 11 14:01:25 2019 +0530
  84. 6917198 TF-A Documentation: Update Security Advisory TFV-5 (CVE-2017-15031) by Alexei Fedorov · Wed Oct 30 10:24:55 2019 +0000
  85. ab1134f Merge "SMMUv3:Changed retry loop to delay timer(GENFW-3329)" into integration by Alexei Fedorov · Mon Nov 04 10:06:56 2019 +0000
  86. bda60d3 SMMUv3:Changed retry loop to delay timer(GENFW-3329) by Deepika Bhavnani · Thu Oct 31 14:09:52 2019 -0600
  87. fe8a105 Merge changes I75799fd4,I4781dc6a into integration by Paul Beesley · Thu Oct 31 17:56:20 2019 +0000
  88. b68e286 n1sdp: update platform macros for dual-chip setup by Manish Pandey · Wed Sep 11 17:07:40 2019 +0100
  89. 2f3203f n1sdp: introduce platform information SDS region by Manish Pandey · Mon Oct 07 17:47:46 2019 +0100
  90. 2dc3271 Merge "doc: Fix syntax erros in I/O storage layer plantuml diagrams" into integration by Paul Beesley · Wed Oct 30 10:16:50 2019 +0000
  91. a217fb5 Merge "ti: k3: common: Add PIE support" into integration by Sandrine Bailleux · Tue Oct 29 15:13:41 2019 +0000
  92. 4ab7e01 ti: k3: common: Add PIE support by Andrew F. Davis · Fri Jan 04 16:04:01 2019 -0600
  93. 03b274c doc: Fix syntax erros in I/O storage layer plantuml diagrams by Sandrine Bailleux · Mon Oct 28 14:02:51 2019 +0100
  94. 8083d1f Merge "plat/arm: use Aff3 bits also to validate mpidr" into integration by Alexei Fedorov · Fri Oct 25 09:36:59 2019 +0000
  95. 07897a9 Tegra194: add macros for security carveout configuration registers by Varun Wadekar · Mon Feb 13 09:00:04 2017 -0800
  96. 0d87c13 Tegra194: add 'TEGRA_TMRUS_SIZE' macro by Steven Kao · Tue Mar 07 13:13:27 2017 +0800
  97. fa871a6 Tegra194: Fix TEGRA186_SMMU_CTX_SIZE by Stefan Kristiansson · Mon Mar 20 14:19:46 2017 +0200
  98. f2cb2d9 Tegra194: Dont run MCE firmware on Emulation by Rohit Khanna · Fri Mar 03 11:33:32 2017 -0800
  99. 0bbb3c3 Tegra194: remove GPU, MPCORE and PTC registers from streamid list by Pritesh Raithatha · Mon Feb 13 17:22:57 2017 +0530
  100. 221093b Tegra194: Support SMC64 encoding for MCE calls by Varun Wadekar · Wed Feb 22 11:57:15 2017 -0800