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git01.mediatek.com / filogic / atf / 4bd3f8ccb6199b7401948992d589d1105ab8a27f / drivers / marvell / comphy
  1. 2be03c0 fix(tree): correct some typos by Elyes Haouas · Mon Feb 13 09:14:48 2023 +0100
  2. 1132db8 refactor(drivers/marvell/comphy-3700): rename Clock Source Low value constants by Marek Behún · Wed Dec 08 01:33:38 2021 +0100
  3. b531ca7 refactor(drivers/marvell/comphy-3700): rename Clock Source Low register constants by Marek Behún · Wed Dec 08 01:29:50 2021 +0100
  4. e58e733 refactor(drivers/marvell/comphy-3700): rename Reset and Clock Control register constants by Marek Behún · Wed Dec 08 01:27:38 2021 +0100
  5. d6d3247 refactor(drivers/marvell/comphy-3700): rename Lane Status 1 register constants by Marek Behún · Wed Dec 08 01:24:36 2021 +0100
  6. d0da334 refactor(drivers/marvell/comphy-3700): rename Miscellaneous Control register constants by Marek Behún · Wed Dec 08 01:20:50 2021 +0100
  7. 6355cdb refactor(drivers/marvell/comphy-3700): rename Idle Sync Enable register constants by Marek Behún · Wed Dec 08 00:15:29 2021 +0100
  8. 5a90dc3 refactor(drivers/marvell/comphy-3700): unify Generation Settings register values by Marek Behún · Wed Dec 08 01:12:00 2021 +0100
  9. ff8afbe refactor(drivers/marvell/comphy-3700): unify Generation Settings register names by Marek Behún · Wed Dec 08 00:52:28 2021 +0100
  10. 781babd4 refactor(drivers/marvell/comphy-3700): drop _ADDR suffixes by Marek Behún · Wed Dec 08 00:46:00 2021 +0100
  11. 0284c8a refactor(drivers/marvell/comphy-3700): drop _REG prefixes and suffixes by Marek Behún · Wed Dec 08 00:37:34 2021 +0100
  12. 4457e65b refactor(drivers/marvell/comphy-3700): move and add comment for COMPHY_RESERVED_REG by Marek Behún · Thu Dec 02 20:04:57 2021 +0100
  13. 88315c5 refactor(drivers/marvell/comphy-3700): move Miscellaneous Control 0 register definition by Marek Behún · Thu Dec 02 20:29:30 2021 +0100
  14. 9a0e4d9 refactor(drivers/marvell/comphy-3700): rename PHY_GEN_USB3_5G to PHY_GEN_MAX_USB3_5G by Marek Behún · Wed Dec 01 13:45:42 2021 +0100
  15. fc38732 refactor(drivers/marvell/comphy-3700): rename Digital Loopback Enable register constant by Marek Behún · Tue Dec 07 23:59:30 2021 +0100
  16. c8b27ce fix(drivers/marvell/comphy): change reg_set() / reg_set16() to update semantics by Marek Behún · Wed Dec 01 18:11:44 2021 +0100
  17. 96ea8fe fix(drivers/marvell/comphy-3700): use reg_set() according to update semantics by Marek Behún · Wed Dec 01 18:03:09 2021 +0100
  18. bca8b6c fix(drivers/marvell/comphy-3700): fix comments about selector register values by Marek Behún · Thu Dec 02 19:23:09 2021 +0100
  19. 593edd5 fix(drivers/marvell/comphy-3700): fix comment about COMPHY status register by Marek Behún · Thu Dec 02 19:14:37 2021 +0100
  20. da9b3d5 fix(drivers/marvell/comphy-3700): fix reference clock selection value names by Marek Behún · Wed Dec 01 13:23:11 2021 +0100
  21. 126f457 fix(drivers/marvell/comphy-3700): drop MODE_REFDIV constant by Marek Behún · Wed Dec 01 17:36:46 2021 +0100
  22. d2a1c03 fix(drivers/marvell/comphy-3700): fix SerDes frequency register value name by Marek Behún · Wed Dec 01 14:01:13 2021 +0100
  23. 71d145e fix(drivers/marvell/comphy-3700): fix Generation Setting registers names by Marek Behún · Wed Dec 01 12:39:10 2021 +0100
  24. c823712 fix(drivers/marvell/comphy-3700): fix PIN_PU_IVREF register name by Marek Behún · Tue Dec 07 23:26:17 2021 +0100
  25. e5dcf98 fix: libc: use long for 64-bit types on aarch64 by Scott Branden · Tue Aug 25 13:49:32 2020 -0700
  26. 6e150d1 fix(drivers/marvell/comphy-3700): configure phy selector also for PCIe by Pali Rohár · Tue Oct 12 14:53:25 2021 +0200
  27. 2f4d69d fix(drivers/marvell/comphy-cp110): fix error code in pcie power on by Pali Rohár · Fri Sep 24 14:43:54 2021 +0200
  28. 26a9862 fix(drivers/marvell/comphy-3700): handle failures in power functions by Pali Rohár · Thu Sep 23 14:47:18 2021 +0200
  29. c335e37 fix(drivers/marvell/comphy-3700): fix address overflow by Pali Rohár · Thu Sep 23 18:19:24 2021 +0200
  30. 58e9925 refactor(drivers/marvell/comphy-3700): simplify usage of comphy_sgmii_phy_init() by Pali Rohár · Thu Sep 23 15:08:00 2021 +0200
  31. 15b183c refactor(drivers/marvell/comphy-3700): simplify usage of indirect access on lane2 by Pali Rohár · Thu Sep 23 14:11:25 2021 +0200
  32. 754cec9 refactor(drivers/marvell/comphy-3700): simplify usage of sata power off by Pali Rohár · Thu Sep 23 12:33:42 2021 +0200
  33. 51974d2 fix(drivers/marvell/comphy): fix name of 3.125G SerDes mode by Pali Rohár · Fri Aug 27 11:16:43 2021 +0200
  34. a1b3ee0 Merge "fix(plat/marvell/armada): select correct pcie reference clock source" into integration by Manish Pandey · Mon Jun 07 15:45:30 2021 +0200
  35. 52c1de5 fix(plat/marvell/a3720/uart): fix UART parent clock rate determination by Pali Rohár · Fri May 14 15:52:11 2021 +0200
  36. 4ad4313 fix(plat/marvell/armada): select correct pcie reference clock source by Guo Yi · Thu Dec 17 22:30:54 2020 +0000
  37. b0a7430 drivers: marvell: comphy: add rx training on 10G port by Alex Evraev · Wed Jun 24 22:24:56 2020 +0300
  38. 2309961 plat/marvell/armada: allow builds without MSS support by Konstantin Porotchkin · Mon Oct 12 18:13:07 2020 +0300
  39. bcc4416b drivers: marvell: comphy-a3700: Set TXDCLK_2X_SEL bit during PCIe initialization by Pali Rohár · Wed Mar 24 17:03:43 2021 +0100
  40. c9ae236 drivers: marvell: comphy-a3700: Set mask parameter for every reg_set call by Pali Rohár · Wed Mar 24 16:40:46 2021 +0100
  41. 741f7d6 drivers: marvell: comphy-a3700: Fix configuring polarity invert bits by Pali Rohár · Wed Mar 24 16:34:45 2021 +0100
  42. 78f8bec marvell: comphy: cp110: add support for USB comphy polarity invert by Grzegorz Jaszczyk · Tue Jan 21 17:02:29 2020 +0100
  43. ff9311b marvell: comphy: cp110: add support for SATA comphy polarity invert by Grzegorz Jaszczyk · Tue Jan 21 17:02:10 2020 +0100
  44. 779fd46 marvell: comphy: cp110: implement erratum IPCE_COMPHY-1353 by Marcin Wojtas · Mon Sep 09 03:38:18 2019 +0200
  45. c30b886 drivers: marvell: mg_conf_cm3: pass comphy lane number to AP FW by Grzegorz Jaszczyk · Tue Jun 18 14:43:02 2019 +0200
  46. 1540ffb marvell: comphy: start AP FW when comphy AP mode selected by Grzegorz Jaszczyk · Fri Apr 12 16:57:14 2019 +0200
  47. 7a61f16 marvell: comphy: initialize common phy selector for AP mode by Grzegorz Jaszczyk · Thu Mar 28 13:02:42 2019 +0100
  48. 3eb5e40 marvell: comphy: update rx_training procedure by Grzegorz Jaszczyk · Fri Mar 08 19:51:21 2019 +0100
  49. 3039bce marvell: armada: add extra level in marvell platform hierarchy by Grzegorz Jaszczyk · Tue Nov 05 13:14:59 2019 +0100
  50. 4f94cbc drivers: marvell: comphy-a3700: support SGMII COMPHY power off by Marek Behún · Tue Nov 05 15:21:54 2019 +0100
  51. 718e02c drivers: marvell: comphy-a3700: fix USB3 powering on when on lane 2 by Marek Behún · Tue Oct 08 17:36:14 2019 +0200
  52. e0f9063 Sanitise includes across codebase by Antonio Nino Diaz · Fri Dec 14 00:18:21 2018 +0000
  53. bd51efd mvebu: cp110: avoid pcie power on/off sequence when called from Linux by Igal Liberman · Thu Nov 15 16:13:11 2018 +0200
  54. 05b1773 mvebu: cp110: fix phy selector configuration for XFI1 by Grzegorz Jaszczyk · Fri Oct 19 15:30:02 2018 +0200
  55. 5eb8837 Standardise header guards across codebase by Antonio Nino Diaz · Thu Nov 08 10:20:19 2018 +0000
  56. ede192d drivers: marvell Add Armada-37xx COMPHY driver by Konstantin Porotchkin · Mon Oct 08 16:48:52 2018 +0300
  57. 2ed16f5 mvebu: cp110: introduce COMPHY porting layer by Grzegorz Jaszczyk · Fri Jun 29 18:00:33 2018 +0200
  58. a91ea62 mvebu: cp110: fix spelling in register definition by Grzegorz Jaszczyk · Mon Jul 16 12:18:03 2018 +0200
  59. 4cff308 mvebu: cp110: align all comphy_index arguments type by Grzegorz Jaszczyk · Thu Jul 12 07:40:34 2018 +0200
  60. 00086e3 libc: Use printf and snprintf across codebase by Antonio Nino Diaz · Thu Aug 16 16:46:06 2018 +0100
  61. 6bca8be Replace stdio.h functions by TF functions by Antonio Nino Diaz · Thu Aug 09 15:30:28 2018 +0100
  62. 5d93d08 mvebu: cp110: add COMPHY driver by Konstantin Porotchkin · Tue Apr 24 19:23:09 2018 +0300