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git01.mediatek.com / filogic / atf / 4490ad2f5d9a8a423f2a9b1be8d500aec77dcc0b / plat
  1. 09a3b8d Merge changes I08cf22df,I535ee414,Ie84cfc96,I8c35ce4e,If7649764, ... into integration by Soby Mathew · Fri Sep 13 11:51:49 2019 +0000
  2. 2c05ba8 Merge "mediatek: mt8173: apply MULTI_CONSOLE framework" into integration by Sandrine Bailleux · Fri Sep 13 07:03:01 2019 +0000
  3. ea20117 mediatek: mt8173: apply MULTI_CONSOLE framework by developer · Thu May 02 20:33:58 2019 +0800
  4. f473d8c Merge "Tegra: memctrl_v2: fix "overflow before widen" coverity issue" into integration by Soby Mathew · Thu Sep 12 16:10:29 2019 +0000
  5. 461f8f4 Invalidate dcache build option for bl2 entry at EL3 by Hadi Asyrafi · Tue Aug 20 15:33:27 2019 +0800
  6. 2be8e62 Merge "intel: agilex: Fix psci power domain off" into integration by Soby Mathew · Thu Sep 12 12:33:02 2019 +0000
  7. 6323e60 Merge "plat: xilinx: zynqmp: Initialize IPI table from zynqmp_config_setup()" into integration by Soby Mathew · Thu Sep 12 12:29:46 2019 +0000
  8. 76cd929 Merge "Add UBSAN support and handlers" into integration by Soby Mathew · Thu Sep 12 11:14:21 2019 +0000
  9. 018699f Merge changes I072c0f61,I798401f4,I9648ef55,I7225d9fa,Ife682288, ... into integration by Soby Mathew · Thu Sep 12 11:11:34 2019 +0000
  10. c60016a Merge changes from topic "amlogic-refactoring" into integration by Soby Mathew · Thu Sep 12 10:58:43 2019 +0000
  11. 91071fc intel: agilex: Fix psci power domain off by Hadi Asyrafi · Thu Sep 12 15:14:01 2019 +0800
  12. 41f0ed3 amlogic: Fix includes order by Carlo Caione · Tue Sep 03 12:38:58 2019 +0100
  13. 56e9863 amlogic: Fix header guards by Carlo Caione · Wed Aug 28 10:14:46 2019 +0100
  14. 83e0488 Add UBSAN support and handlers by Justin Chadwell · Tue Aug 20 11:01:52 2019 +0100
  15. 6a90347 plat: xilinx: zynqmp: Initialize IPI table from zynqmp_config_setup() by Jolly Shah · Tue Aug 27 11:23:08 2019 -0700
  16. ed06128 Merge changes from topic "yg/stm32mp1_wdg_updates" into integration by Soby Mathew · Tue Sep 10 14:32:59 2019 +0000
  17. c05a0b5 mediatek: mt8183: Support coreboot configuration by Hung-Te Lin · Thu May 02 21:42:41 2019 +0800
  18. 043c933 mediatek: mt8183: support system reset by developer · Fri May 03 17:02:46 2019 +0800
  19. 092c53a mediatek: mt8183: pass platform parameters by developer · Fri May 03 16:59:07 2019 +0800
  20. b7ba14b mediatek: mt8183: add GPIO driver by developer · Thu May 02 20:24:50 2019 +0800
  21. 6f37fd2 mediatek: mt8183: support system off by developer · Thu May 02 20:02:05 2019 +0800
  22. a21d47e mediatek: mt8183: support CPU hotplug by developer · Thu May 02 19:29:25 2019 +0800
  23. 508dc02 mediatek: mt8183: refine GIC driver by developer · Tue Jun 25 15:33:48 2019 +0800
  24. 8b1c004 Tegra: memctrl_v2: fix "overflow before widen" coverity issue by Varun Wadekar · Thu Sep 05 08:17:02 2019 -0700
  25. 1e3e33b amlogic: Fix prefixes in the SoC specific files by Carlo Caione · Wed Aug 28 15:32:22 2019 +0100
  26. 883e3ca amlogic: Fix prefixes in the PM code by Carlo Caione · Wed Aug 28 15:19:56 2019 +0100
  27. 7bb8302 amlogic: Fix prefixes in the SCPI related code by Carlo Caione · Wed Aug 28 10:08:24 2019 +0100
  28. 9c85f25 amlogic: Fix prefixes in the MHU code by Carlo Caione · Wed Aug 28 09:46:18 2019 +0100
  29. 107df3e amlogic: Fix prefixes in the SIP/SVC code by Carlo Caione · Mon Aug 26 13:04:12 2019 +0100
  30. 68aa5ee amlogic: Fix prefixes in the thermal driver by Carlo Caione · Sun Aug 25 18:09:59 2019 +0100
  31. bf2d626 amlogic: Fix prefixes in the private header file by Carlo Caione · Sun Aug 25 18:09:03 2019 +0100
  32. bed1897 amlogic: Fix prefixes in the efuse driver by Carlo Caione · Sun Aug 25 17:26:27 2019 +0100
  33. 60c828b amlogic: Fix prefixes in the platform macros file by Carlo Caione · Sat Aug 24 18:51:48 2019 +0100
  34. 1afdfb0 amlogic: Fix prefixes in the helpers file by Carlo Caione · Sat Aug 24 18:47:06 2019 +0100
  35. 7408b0c amlogic: Rework Makefiles by Carlo Caione · Sat Aug 24 18:37:46 2019 +0100
  36. 9edb673 amlogic: Move the SIP SVC code to common directory by Carlo Caione · Sat Aug 24 17:52:40 2019 +0100
  37. 6415f6e amlogic: Move topology file to common directory by Carlo Caione · Sat Aug 24 17:50:16 2019 +0100
  38. 52d4dc2 amlogic: Move thermal code to common directory by Carlo Caione · Sat Aug 24 17:48:11 2019 +0100
  39. e6ae8e7 amlogic: Move MHU code to common directory by Carlo Caione · Sat Aug 24 17:46:04 2019 +0100
  40. 0030679 amlogic: Move efuse code to common directory by Carlo Caione · Sat Aug 24 17:43:33 2019 +0100
  41. 1555ebb amlogic: Move platform macros assembly file to common directory by Carlo Caione · Sat Aug 24 17:36:32 2019 +0100
  42. e5a30db amlogic: Introduce unified private header file by Carlo Caione · Sat Aug 24 17:31:51 2019 +0100
  43. 4948832 amlogic: Move SCPI code to common directory by Carlo Caione · Sat Aug 24 17:28:23 2019 +0100
  44. 23a9ad2 amlogic: Move the SHA256 DMA driver to common directory by Carlo Caione · Sat Aug 24 17:17:30 2019 +0100
  45. d6e5afb amlogic: Move assembly helpers to common directory by Carlo Caione · Fri Aug 23 20:02:32 2019 +0100
  46. 50e8a27 amlogic: Introduce directory parameters in the makefiles by Carlo Caione · Fri Aug 23 19:34:44 2019 +0100
  47. 189494a meson: Rename platform directory to amlogic by Carlo Caione · Fri Aug 23 18:28:36 2019 +0100
  48. 60021ea Merge "intel: stratix10: Fix reliance on hard coded clock information" into integration by Sandrine Bailleux · Thu Sep 05 09:11:31 2019 +0000
  49. 0d42b55 uniphier: set CONSOLE_FLAG_TRANSLATE_CRLF and clean up console driver by Masahiro Yamada · Tue Jul 23 12:53:41 2019 +0900
  50. e97b663 stm32mp1: move check_header() to common code by Yann Gautier · Fri Apr 19 10:48:36 2019 +0200
  51. 738df26 stm32mp1: keep console during runtime by Yann Gautier · Wed Apr 24 16:14:22 2019 +0200
  52. 7ffe84b stm32mp1: sp_min: initialize MMU and cache earlier by Yann Gautier · Thu Jul 11 10:45:09 2019 +0200
  53. 917a00c stm32mp1: add support for LpDDR3 by Yann Gautier · Tue Apr 16 16:20:58 2019 +0200
  54. f540a59 stm32mp1: use a common function to check spinlock is available by Yann Gautier · Wed May 22 19:13:51 2019 +0200
  55. af19ff9 stm32mp1: check if the SoC is single core by Yann Gautier · Tue Jun 04 18:23:10 2019 +0200
  56. 35dc077 stm32mp1: print information about board by Yann Gautier · Mon May 13 18:34:48 2019 +0200
  57. c737405 stm32mp1: print information about SoC by Yann Gautier · Tue Jun 04 18:02:37 2019 +0200
  58. 091eab5 stm32mp1: add watchdog support by Yann Gautier · Tue Jun 04 18:06:34 2019 +0200
  59. dcc9ef8 rcar_get3: drivers: ddr: Partly unify register macros between DDR A and B by Marek Vasut · Wed Aug 07 18:19:26 2019 +0200
  60. a2e5d19 rcar_get3: drivers: ddr: Clean up common code by Marek Vasut · Wed Aug 07 18:05:05 2019 +0200
  61. cc077d9 Merge "intel: agilex: Clear PLL lostlock bypass mode" into integration by Paul Beesley · Wed Aug 28 13:05:51 2019 +0000
  62. 0eeeb9b Merge "tegra: add support for multi console interface" into integration by Sandrine Bailleux · Tue Aug 27 22:50:42 2019 +0000
  63. 02d8c39 Merge "plat/arm: Introduce corstone700 platform." into integration by Paul Beesley · Tue Aug 20 14:47:56 2019 +0000
  64. c57350d Merge "rcar_gen3: plat: Rename RCAR_PRODUCT_* to PRR_PRODUCT_*" into integration by Paul Beesley · Tue Aug 20 14:14:03 2019 +0000
  65. 52990ae plat/arm: Introduce corstone700 platform. by Manish Pandey · Wed Nov 28 11:20:37 2018 +0000
  66. 87cfd25 Merge "rcar_gen3: plat: Factor out PRR_ macros into rcar_def.h" into integration by Paul Beesley · Tue Aug 20 14:12:40 2019 +0000
  67. 5e2f6c7 Merge "intel: agilex: HMC driver calculate DDR size" into integration by Paul Beesley · Tue Aug 20 09:38:32 2019 +0000
  68. 771255f Merge "console: add a flag to prepend '\r' in the multi-console framework" into integration by Paul Beesley · Tue Aug 20 09:37:37 2019 +0000
  69. 5d7c656 intel: agilex: HMC driver calculate DDR size by Hadi Asyrafi · Fri Aug 16 17:07:42 2019 +0800
  70. 269a8ad console: add a flag to prepend '\r' in the multi-console framework by Masahiro Yamada · Tue Jul 23 12:32:58 2019 +0900
  71. 56c4901 intel: agilex: Clear PLL lostlock bypass mode by Hadi Asyrafi · Fri Aug 16 11:08:14 2019 +0800
  72. 77725e2 Merge "FVP: Add Delay Timer driver to BL1 and BL31" into integration by Paul Beesley · Fri Aug 16 14:48:32 2019 +0000
  73. 7131d83 FVP: Add Delay Timer driver to BL1 and BL31 by Alexei Fedorov · Fri Aug 16 14:15:59 2019 +0100
  74. 9cadc78 rcar_gen3: plat: Rename RCAR_PRODUCT_* to PRR_PRODUCT_* by Marek Vasut · Tue Aug 06 19:13:22 2019 +0200
  75. d97f6ee rcar_gen3: plat: Factor out PRR_ macros into rcar_def.h by Marek Vasut · Tue Aug 06 18:58:38 2019 +0200
  76. f2f0495 Merge changes from topic "lm/juno_dyn_cfg" into integration by Paul Beesley · Fri Aug 16 10:24:53 2019 +0000
  77. 09a22e7 tegra: add support for multi console interface by Ambroise Vincent · Wed May 29 14:04:16 2019 +0100
  78. ad90712 Merge "intel: agilex: Fix memory controller driver" into integration by Paul Beesley · Thu Aug 15 15:30:51 2019 +0000
  79. 47689d7 Merge changes from topic "rockchip-uart-fixes" into integration by Paul Beesley · Thu Aug 15 15:30:13 2019 +0000
  80. 83fe38e intel: agilex: Fix memory controller driver by Hadi Asyrafi · Thu Aug 08 18:52:31 2019 +0800
  81. a813fed intel: agilex: Fix reliance on hard coded clock information by Hadi Asyrafi · Wed Aug 14 13:49:00 2019 +0800
  82. 3e7c38a Juno: Use shared mbedtls heap between bl1 and bl2 by Louis Mayencourt · Wed Jul 31 15:03:44 2019 +0100
  83. 65cac46 Juno: add basic support for dynamic config by Louis Mayencourt · Mon Jul 29 10:40:17 2019 +0100
  84. 78fee35 intel: stratix10: Fix reliance on hard coded clock information by Hadi Asyrafi · Tue Jul 30 22:18:17 2019 +0800
  85. 84cd6c0 rockchip: rk3399: store actual debug uart information on suspend by Heiko Stuebner · Mon Aug 05 16:44:36 2019 +0200
  86. 40b3cb1 rockchip: move dt-coreboot uart distinction into param handling code by Heiko Stuebner · Mon Aug 05 16:40:35 2019 +0200
  87. 462c6c4 Merge changes from topic "intel-plat-refactor" into integration by Sandrine Bailleux · Wed Aug 07 14:20:01 2019 +0000
  88. 309ac01 intel: Platform common code refactor by Hadi Asyrafi · Thu Aug 01 14:48:39 2019 +0800
  89. f2a0450 Merge changes from topic "qemu_sbsa" into integration by Sandrine Bailleux · Tue Aug 06 14:54:35 2019 +0000
  90. 0416f69 Merge "meson: gxl: Fix CPU hotplug" into integration by Sandrine Bailleux · Tue Aug 06 11:04:10 2019 +0000
  91. 42aba05 rockchip: make uart baudrate configurable by Heiko Stuebner · Mon Aug 05 14:46:00 2019 +0200
  92. 64a4a7a rockchip: px30: add uart5 as option for serial output by Heiko Stuebner · Mon Aug 05 09:45:09 2019 +0200
  93. c6ee93c Merge "intel: stratix10: Fix BL31 memory mapping" into integration by Alexei Fedorov · Fri Aug 02 12:50:31 2019 +0000
  94. e2b2c4c Merge "meson: gxl: Fix reset and power off" into integration by Alexei Fedorov · Fri Aug 02 12:50:04 2019 +0000
  95. acee488 intel: stratix10: Fix BL31 memory mapping by Hadi Asyrafi · Thu Aug 01 11:29:48 2019 +0800
  96. 3d50b43 meson: gxl: Fix CPU hotplug by Remi Pommarel · Tue Jul 30 18:04:38 2019 +0200
  97. db28917 meson: gxl: Fix reset and power off by Remi Pommarel · Thu Apr 04 23:12:56 2019 +0200
  98. 8e0ef0f Switch AARCH32/AARCH64 to __aarch64__ by Julius Werner · Tue Jul 09 14:02:43 2019 -0700
  99. 53456fc Replace __ASSEMBLY__ with compiler-builtin __ASSEMBLER__ by Julius Werner · Tue Jul 09 13:49:11 2019 -0700
  100. 6a240c7 intel: Platform common code refactor by Hadi Asyrafi · Thu Aug 01 15:21:20 2019 +0800