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git01.mediatek.com / filogic / atf / 42771afa7b2f9d63515b3b0a723fbfc8d5b7b1f7 / lib / cpus / aarch64 / cortex_a72.S
  1. bb0aa39 cpulib: Add ISBs or comment why they are unneeded by Dimitris Papastamos · 6 years ago
  2. ba51d9e Add support for dynamic mitigation for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  3. e6625ec Implement static workaround for CVE-2018-3639 by Dimitris Papastamos · 6 years ago
  4. 570c06a Rename symbols and files relating to CVE-2017-5715 by Dimitris Papastamos · 6 years ago
  5. 914757c Fixup `SMCCC_ARCH_FEATURES` semantics by Dimitris Papastamos · 6 years ago
  6. 780cc95 Use PFR0 to identify need for mitigation of CVE-2017-5715 by Dimitris Papastamos · 6 years ago
  7. 858bd61 Print erratum application report for CVE-2017-5715 by Dimitris Papastamos · 6 years ago
  8. 446f7f1 Workaround for CVE-2017-5715 on Cortex A57 and A72 by Dimitris Papastamos · 7 years ago
  9. c3b4ca1 Cortex-A72: Implement workaround for erratum 859971 by Eleanor Bonnici · 7 years ago
  10. 41b61be CPU: Correct names of implementation-defined aux regs by Eleanor Bonnici · 7 years ago
  11. 1384a16 Unique names for defines in the CPU libraries by Varun Wadekar · 7 years ago
  12. fa3cf0b Use SPDX license identifiers by dp-arm · 7 years ago
  13. ee5eb80 Add provision to extend CPU operations at more levels by Jeenu Viswambharan · 8 years ago
  14. 6a72a91 bl31: Add error reporting registers by Naga Sureshkumar Relli · 8 years ago
  15. a877c25 Add support to indicate size and end of assembly functions by Kévin Petit · 9 years ago
  16. c47e011 Add support for ARM Cortex-A72 processor by Vikram Kanigiri · 9 years ago