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git01.mediatek.com / filogic / atf / 3e992d6e5823bfe6da9b1e3792ef4ee20a2c0e13 / include / arch / aarch64 / arch.h
  1. 3b84c96 feat(cpufeat): add feature detection for FEAT_CSV2_3 by Sona Mathew · Wed Oct 25 16:48:19 2023 -0500
  2. a4752e2 fix(el3-runtime): restrict lower el EA handlers in FFH mode by Manish Pandey · Wed Oct 11 11:52:24 2023 +0100
  3. 696ed4f Merge "feat(cpufeat): add memory retention bit define for CLUSTERPWRDN" into integration by Madhukar Pappireddy · Tue Oct 31 23:15:55 2023 +0100
  4. ab28d4b fix(mpam): refine MPAM initialization and enablement process by Arvind Ram Prakash · Wed Oct 11 12:10:56 2023 -0500
  5. dc4ed33 feat(cpufeat): add memory retention bit define for CLUSTERPWRDN by Jacky Bai · Wed Sep 13 09:21:40 2023 +0800
  6. c3d68fc Merge "feat(cpufeat): initialize HFG*_EL2 registers" into integration by Manish Pandey · Wed Aug 30 16:19:26 2023 +0200
  7. efdfe36 fix(cpus): check for SME presence in Gelas by Juan Pablo Conde · Mon Aug 14 16:20:52 2023 -0500
  8. 0dda424 refactor(cpufeat): introduce wrapper macro for read_feat_...() functions by Andre Przywara · Tue Apr 18 16:58:36 2023 +0100
  9. f725298 feat(cpufeat): initialize HFG*_EL2 registers by Juan Pablo Conde · Mon Jul 10 16:00:41 2023 -0500
  10. 919d3c8 refactor(cm): set MDCR_EL3/CPTR_EL3 bits in respective feat_init_el3() only by Boyan Karatotev · Mon Feb 13 16:32:47 2023 +0000
  11. 6e2fd8b fix(cm): set MDCR_EL3.{NSPBE, STE} explicitly by Boyan Karatotev · Mon Feb 13 16:38:37 2023 +0000
  12. df4ad84 feat(mte): adds feature detection for MTE_PERM by Maksims Svecovs · Fri Mar 24 13:05:09 2023 +0000
  13. 677ed8a refactor(pmu): convert FEAT_MTPMU to C and move to persistent register init by Boyan Karatotev · Thu Feb 16 09:45:29 2023 +0000
  14. 05504ba feat(pmu): introduce pmuv3 lib/extensions folder by Boyan Karatotev · Wed Feb 15 13:21:50 2023 +0000
  15. b7e7443 fix(pmu): make MDCR_EL3.MTPME=1 out of reset by Boyan Karatotev · Thu Jun 15 14:46:20 2023 +0100
  16. 8c8107e feat(xlat): detect 4KB and 16KB page support when FEAT_LPA2 is present by Javier Almansa Sobrino · Wed May 03 12:16:11 2023 +0100
  17. 9b468c3 Merge changes I1bfa797e,I0ec7a70e into integration by Manish Pandey · Tue May 09 22:05:52 2023 +0200
  18. 2be03c0 fix(tree): correct some typos by Elyes Haouas · Mon Feb 13 09:14:48 2023 +0100
  19. 870627e refactor(cpufeat): enable FEAT_RAS for FEAT_STATE_CHECKED by Andre Przywara · Fri Jan 27 12:25:49 2023 +0000
  20. cfe053a feat(sme): enable SME2 functionality for NS world by Jayanth Dodderi Chidanand · Tue Nov 08 10:31:07 2022 +0000
  21. 326f295 feat(gcs): support guarded control stack by Mark Brown · Tue Mar 14 21:33:04 2023 +0000
  22. d4d7167 Merge "feat(hcx): initialize HCRX_EL2 to its default value" into integration by Manish Pandey · Thu Apr 13 18:10:44 2023 +0200
  23. 72e0da1 feat(hcx): initialize HCRX_EL2 to its default value by Juan Pablo Conde · Wed Feb 22 10:09:52 2023 -0600
  24. 293a661 feat(pie/por): support permission indirection and overlay by Mark Brown · Tue Mar 14 20:48:43 2023 +0000
  25. 3edbfa7 fix(aarch64): allow build with ARM_ARCH_MINOR=4 by Andre Przywara · Tue Mar 28 16:55:06 2023 +0100
  26. 605419a feat(cpufeat): enable FEAT_SME for FEAT_STATE_CHECKED by Jayanth Dodderi Chidanand · Mon Mar 06 23:56:14 2023 +0000
  27. edc449d refactor(cpufeat): enable FEAT_NV2 for FEAT_STATE_CHECKED by Andre Przywara · Fri Jan 27 14:09:20 2023 +0000
  28. c735f1c refactor(cpufeat): use alternative encoding for "SB" barrier by Andre Przywara · Fri Nov 25 14:10:13 2022 +0000
  29. 98908b3 refactor(cpufeat): enable FEAT_VHE for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 16:42:09 2022 +0000
  30. 84b8653 refactor(mpam): enable FEAT_MPAM for FEAT_STATE_CHECKED by Andre Przywara · Thu Nov 17 16:42:09 2022 +0000
  31. c37eee7 feat(tcr2): support FEAT_TCR2 by Mark Brown · Tue Mar 14 20:13:03 2023 +0000
  32. 3dc3cad fix(mpam): run-time checks for mpam save/restore routines by Rohit Mathew · Fri Nov 11 18:45:11 2022 +0000
  33. bdc76f1 feat(fvp): emulate trapped RNDR by Andre Przywara · Mon Nov 21 17:07:25 2022 +0000
  34. fcb716f Merge "feat(pauth): add/modify helpers to support QARMA3" into integration by Manish Pandey · Thu Sep 22 11:59:39 2022 +0200
  35. d4e2503 feat(gic): add APIs to raise NS and S-EL1 SGIs by Florian Lugou · Wed Sep 08 12:40:24 2021 +0200
  36. e089a17 feat(pauth): add/modify helpers to support QARMA3 by Juan Pablo Conde · Wed Jun 29 17:44:43 2022 -0400
  37. 42305f2 feat(rng-trap): add EL3 support for FEAT_RNG_TRAP by Juan Pablo Conde · Tue Jul 12 16:40:29 2022 -0400
  38. 423045d fix(include/aarch64): fix encodings for MPAMVPM* registers by Varun Wadekar · Wed May 25 12:45:22 2022 +0100
  39. 67259f8 Merge "fix(errata): workaround for Cortex-A710 erratum 2008768" into integration by Bipin Ravi · Tue May 10 22:49:06 2022 +0200
  40. 8a48954 Merge "fix(amu): limit virtual offset register access to NS world" into integration by Joanna Farley · Tue May 10 15:55:05 2022 +0200
  41. 7d52a8f fix(errata): workaround for Cortex-A710 erratum 2008768 by johpow01 · Wed Mar 09 16:23:04 2022 -0600
  42. 8186596 feat(brbe): add BRBE support for NS world by johpow01 · Fri Jan 28 17:06:20 2022 -0600
  43. cc79927 fix(amu): limit virtual offset register access to NS world by John Powell · Tue Mar 29 00:25:59 2022 -0500
  44. 9461a89 refactor(el3-runtime): add arch-features detection mechanism by Jayanth Dodderi Chidanand · Mon Jan 17 18:57:17 2022 +0000
  45. 74b7e44 feat(ccidx): update the do_dcsw_op function to support FEAT_CCIDX by johpow01 · Wed Dec 01 13:18:30 2021 -0600
  46. 9baade3 feat(sme): enable SME functionality by johpow01 · Thu Jul 08 14:14:00 2021 -0500
  47. 03be39d feat(mpmm): add support for MPMM by Chris Kay · Wed May 05 13:38:30 2021 +0100
  48. a40141d refactor(amu): detect architected counters at runtime by Chris Kay · Tue May 25 12:33:18 2021 +0100
  49. a5fde28 refactor(amu): factor out register accesses by Chris Kay · Wed May 26 11:58:23 2021 +0100
  50. 88fb9af Merge "feat(fvp_r): configure system registers to boot rich OS" into integration by Joanna Farley · Thu Oct 07 18:14:43 2021 +0200
  51. 5693afe feat(fvp_r): configure system registers to boot rich OS by Manish Pandey · Wed Oct 06 17:28:09 2021 +0100
  52. 9d13402 refactor(gpt): productize and refactor GPT library by johpow01 · Wed Jun 16 17:57:28 2021 -0500
  53. 13dc8f1 feat(rme): add RMM dispatcher (RMMD) by Zelalem Aweke · Fri Jul 09 14:20:03 2021 -0500
  54. 79e3d29 feat(rme): add register definitions and helper functions for FEAT_RME by Zelalem Aweke · Thu Jul 08 16:51:14 2021 -0500
  55. 3d7f654 chore: fvp_r: Initial No-EL3 and MPU Implementation by Gary Morrison · Wed Jan 27 13:08:47 2021 -0600
  56. f91e59f feat(hcx): add build option to enable FEAT_HCX by johpow01 · Wed Aug 04 19:38:18 2021 -0500
  57. 8ce3394 feat(trf): initialize trap settings of trace filter control registers access by Manish V Badarkhe · Sun Jul 18 02:26:27 2021 +0100
  58. f7ee064 feat(sys_reg_trace): initialize trap settings of trace system registers access by Manish V Badarkhe · Wed Jul 07 16:27:10 2021 +0100
  59. 20df29c feat(trbe): enable access to trace buffer control registers from lower NS EL by Manish V Badarkhe · Fri Jul 02 09:10:56 2021 +0100
  60. e1cccb4 feat(trbe): initialize trap settings of trace buffer control registers access by Manish V Badarkhe · Wed Jun 23 20:02:39 2021 +0100
  61. 44b4333 fix(sdei): set SPSR for SDEI based on TakeException by Daniel Boulby · Wed Nov 25 16:36:46 2020 +0000
  62. c450277 feat(sve): enable SVE for the secure world by Max Shvetsov · Mon Mar 22 11:59:37 2021 +0000
  63. 307f34b fix(security): Set MDCR_EL3.MCCD bit by Alexei Fedorov · Fri May 14 11:21:56 2021 +0100
  64. fa59c6f Enable v8.6 AMU enhancements (FEAT_AMUv1p1) by johpow01 · Fri Oct 02 13:41:11 2020 -0500
  65. 6fd816e Define registers for FEAT_RNG support by Tomas Pilar · Wed Oct 28 15:34:12 2020 +0000
  66. f3a4c54 Add support for FEAT_MTPMU for Armv8.6 by Javier Almansa Sobrino · Mon Nov 23 18:38:15 2020 +0000
  67. 9ecc255 Merge "Aarch64: Add support for FEAT_PANx extensions" into integration by Manish Pandey · Thu Dec 03 13:08:02 2020 +0000
  68. af54f6e Aarch64: Add support for FEAT_MTE3 by Alexei Fedorov · Tue Dec 01 13:22:25 2020 +0000
  69. c082f03 Aarch64: Add support for FEAT_PANx extensions by Alexei Fedorov · Wed Nov 25 14:07:05 2020 +0000
  70. ed20207 Increase type widths to satisfy width requirements by Jimmy Brisson · Tue Aug 04 16:18:52 2020 -0500
  71. 7e6306b TF-A AMU extension: fix detection of group 1 counters. by Alexei Fedorov · Tue Jul 14 08:17:56 2020 +0100
  72. 9223485 Prevent RAS register access from lower ELs by Varun Wadekar · Fri Jun 12 10:11:28 2020 -0700
  73. 8357389 Enable ARMv8.6-ECV Self-Synch when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:48:02 2020 -0500
  74. ecc3c67 Enable ARMv8.6-FGT when booting to EL2 by Jimmy Brisson · Thu Apr 16 10:47:56 2020 -0500
  75. 1993355 TF-A: Fix wrong register read for MPAM extension by Alexei Fedorov · Tue May 26 13:16:41 2020 +0100
  76. 3e24c16 Enable v8.6 WFE trap delays by johpow01 · Wed Apr 22 14:05:13 2020 -0500
  77. 2801ed4 Implement workaround for AT speculative behaviour by Manish V Badarkhe · Tue Apr 28 04:53:32 2020 +0100
  78. 90d6532 Provide a hint to power controller for DSU cluster power down by Madhukar Pappireddy · Wed Oct 30 14:24:39 2019 -0500
  79. a5c6636 Fix MISRA C issues in BL1/BL2/BL31 by John Powell · Fri Mar 20 14:21:05 2020 -0500
  80. 813c9f9 Fix crash dump for lower EL by Alexei Fedorov · Tue Mar 03 13:31:58 2020 +0000
  81. c9e2c92 SPMD: Adds partially supported EL2 registers. by Max Shvetsov · Mon Feb 17 16:15:47 2020 +0000
  82. bdf502d SPMD: save/restore EL2 system registers. by Max Shvetsov · Tue Feb 25 13:56:19 2020 +0000
  83. 787a129 Tegra: delay_timer: support for physical secure timer by Varun Wadekar · Mon Jun 18 16:15:51 2018 -0700
  84. a533447 S-EL2 Support: Check for AArch64 by Artsem Artsemenka · Tue Nov 26 16:40:31 2019 +0000
  85. 023c155 Add support for enabling S-EL2 by Achin Gupta · Fri Oct 11 14:44:05 2019 +0100
  86. c235b12 Merge changes from topic "jc/mte_enable" into integration by Soby Mathew · Thu Sep 12 12:31:22 2019 +0000
  87. 83e0488 Add UBSAN support and handlers by Justin Chadwell · Tue Aug 20 11:01:52 2019 +0100
  88. 1c7c13a Enable MTE support in both secure and non-secure worlds by Justin Chadwell · Thu Jul 18 14:25:33 2019 +0100
  89. c7a7cc3 Merge "AArch64: Disable Secure Cycle Counter" into integration by Paul Beesley · Fri Aug 23 11:26:57 2019 +0000
  90. 503bbf3 AArch64: Disable Secure Cycle Counter by Alexei Fedorov · Tue Aug 13 15:17:53 2019 +0100
  91. a95a589 FVP_Base_AEMv8A platform: Fix cache maintenance operations by Alexei Fedorov · Mon Jul 29 17:22:53 2019 +0100
  92. c97455a Merge changes from topic "jts/spsr" into integration by Soby Mathew · Thu Jul 25 09:13:49 2019 +0000
  93. 5553417 SSBS: init SPSR register with default SSBS value by John Tsichritzis · Tue Jul 23 11:12:41 2019 +0100
  94. 4bf6afa Merge "Enable MTE support unilaterally for Normal World" into integration by Soby Mathew · Tue Jul 23 08:55:10 2019 +0000
  95. 830f0ad Enable MTE support unilaterally for Normal World by Soby Mathew · Fri Jul 12 09:23:38 2019 +0100
  96. c31ab38 Aarch64: Fix SCTLR bit definitions by Alexei Fedorov · Wed Jul 10 10:49:12 2019 +0100
  97. 007d745 arch: add some defines for generic timer registers by Yann Gautier · Wed Apr 17 13:47:07 2019 +0200
  98. 90f2e88 Add support for Branch Target Identification by Alexei Fedorov · Fri May 24 12:17:09 2019 +0100
  99. 37f97a5 SPM: Move shim layer to TTBR1_EL1 by Antonio Nino Diaz · Wed Mar 27 11:10:31 2019 +0000
  100. 1f9ff49 Apply variant 4 mitigation for Neoverse N1 by John Tsichritzis · Mon Mar 04 16:41:26 2019 +0000