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git01.mediatek.com / filogic / atf / 39f9eeef9b606a44cf334e0d22bf59b1a149b1c4 / plat / intel / soc / common / include
  1. c5baddf plat: intel: Add FPGAINTF configuration to when configuring pinmux by Tien Hock Loh · Mon May 11 01:11:48 2020 -0700
  2. fcbc33d plat: intel: set DRVSEL and SMPLSEL for DWMMC by Tien Hock Loh · Mon May 11 01:11:39 2020 -0700
  3. 7dd4add Merge "intel: Enable EMAC PHY in Intel FPGA platform" into integration by Sandrine Bailleux · Fri Feb 28 10:51:49 2020 +0000
  4. 6bedfe2 Merge "intel: Fix argument type for mailbox driver" into integration by Sandrine Bailleux · Fri Feb 28 10:23:10 2020 +0000
  5. 25f623e intel: Update RSU driver return code by Abdul Halim, Muhammad Hadi Asyrafi · Thu Feb 27 10:23:48 2020 +0800
  6. d84bfef intel: Fix argument type for mailbox driver by Abdul Halim, Muhammad Hadi Asyrafi · Tue Feb 25 16:28:10 2020 +0800
  7. 8d9e891 intel: Enable EMAC PHY in Intel FPGA platform by Tien Hock, Loh · Wed Oct 02 13:49:25 2019 +0800
  8. c4c4dec Merge "intel: Fix Coverity Scan Defects" into integration by Sandrine Bailleux · Thu Feb 20 09:53:26 2020 +0000
  9. e59b999 intel: Fix Coverity Scan Defects by Abdul Halim, Muhammad Hadi Asyrafi · Tue Feb 11 20:17:05 2020 +0800
  10. 7f95059 Merge "intel: Change boot source selection" into integration by Sandrine Bailleux · Wed Feb 12 15:54:02 2020 +0000
  11. a33e810 intel: Introduce SMC support for mailbox command by Hadi Asyrafi · Tue Dec 17 19:30:41 2019 +0800
  12. 593c4c5 intel: Extend SiP service to support mailbox's RSU by Hadi Asyrafi · Tue Dec 17 19:22:17 2019 +0800
  13. 786db4d intel: Change boot source selection by Hadi Asyrafi · Mon Dec 30 16:00:30 2019 +0800
  14. fc9b411 Enable -Wredundant-decls warning check by Madhukar Pappireddy · Mon Dec 23 14:49:52 2019 -0600
  15. dda01cb intel: Unify Platform specific defines for PSCI module by Deepika Bhavnani · Fri Dec 13 10:50:36 2019 -0600
  16. 6aeb55d intel: Add function to check fpga readiness by Hadi Asyrafi · Tue Dec 24 14:43:22 2019 +0800
  17. 8ebd237 intel: System Manager refactoring by Hadi Asyrafi · Mon Dec 23 17:58:04 2019 +0800
  18. 67cb0ea intel: Refactor reset manager driver by Hadi Asyrafi · Mon Dec 23 13:25:33 2019 +0800
  19. b1ab915 plat: intel: Fix UEFI decompression issue by Tien Hock, Loh · Mon Oct 14 14:48:24 2019 +0800
  20. 5fae68f intel: Implement platform specific system reset 2 by Hadi Asyrafi · Tue Oct 22 14:23:57 2019 +0800
  21. 1e2e3ce Merge changes from topic "mailbox-fixes" into integration by Manish Pandey · Thu Dec 19 17:33:03 2019 +0000
  22. 5011d23 Merge "intel: Create SiP service header file" into integration by Manish Pandey · Wed Dec 18 17:38:08 2019 +0000
  23. 9dfc047 intel: Introduce mailbox response length handling by Hadi Asyrafi · Tue Nov 12 16:39:46 2019 +0800
  24. 2b9198d intel: Fix mailbox config return status by Hadi Asyrafi · Tue Nov 12 15:03:00 2019 +0800
  25. 500b232 plat: intel: Fix FPGA manager on reconfiguration by Tien Hock, Loh · Wed Oct 30 14:49:40 2019 +0800
  26. 527234a plat: intel: Fix mailbox send_cmd issue by Tien Hock, Loh · Wed Oct 30 14:54:25 2019 +0800
  27. c8a281c intel: stratix10: Modify BL31 parameter handling by Hadi Asyrafi · Thu Oct 24 16:13:09 2019 +0800
  28. a2edf0e intel: Modify BL31 address mapping by Hadi Asyrafi · Tue Oct 22 13:39:14 2019 +0800
  29. 0563a85 intel: stratix10: Enable uboot entrypoint support by Hadi Asyrafi · Tue Oct 22 12:59:32 2019 +0800
  30. c516816 intel: Modify mailbox's get_config_status by Hadi Asyrafi · Mon Oct 21 16:25:07 2019 +0800
  31. ab1132f intel: Create SiP service header file by Hadi Asyrafi · Tue Oct 22 10:31:45 2019 +0800
  32. 6f8a2b2 intel: Refactor common platform code [3/5] by Hadi Asyrafi · Wed Oct 23 18:34:14 2019 +0800
  33. f0fa807 intel: Refactor common platform code [2/5] by Hadi Asyrafi · Wed Oct 23 17:02:55 2019 +0800
  34. 9f5dfc9 intel: Refactor common platform code [1/5] by Hadi Asyrafi · Wed Oct 23 16:26:53 2019 +0800
  35. 309ac01 intel: Platform common code refactor by Hadi Asyrafi · Thu Aug 01 14:48:39 2019 +0800